slide 1: Instruction Set of 8085
Microprocessor
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Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 2: Instruction Set of 8085
Microprocessor
Presented By
Er. Swapnil V. Kaware
svkawareyahoo.co.in
B.E.Electronics M.E. Electronics
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 3: What is Instruction
• An instruction is a binary pattern designed
inside a microprocessor to perform a specific
function.
• 8085 has 246 instructions.
• Each instruction is represented by an 8-bit
binary value.
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 4: Classification of Instruction Set
• There are 5 Types
• 1 Data Transfer Instruction
• 2 Arithmetic Instructions
• 3 Logical Instructions
• 4 Branching Instructions
• 5 Control Instructions
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 5: 1 Data Transfer Instructions
• MOV Rd Rs
• MOV M Rs
• MOV Rd M
• This instruction copies the contents of the source
register into the destination register.
• The contents of the source register are not altered.
• Example: MOV BA or MOV MB or MOV CM
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 6: A 20 B 20
A F
B 30 C
D E
H 20 L 50
A 20 B
BEFORE EXECUTION AFTER EXECUTION
MOV BA
A F
B 30 C
D E
H 20 L 50
A F
B C
D E
H 20 L 50
A F
B C 40
D E
H 20 L 50
MOV MB
MOV CM
40
40
30
slide 7: 2 Data Transfer Instructions
• MVI R Data8-bit
• MVI M Data8-bit
• The 8-bit immediate data is stored in the
destination register R or memory M R is
general purpose 8 bit register such as
ABCDEH and L.
• Example: MVI B 60H or MVI M 40H
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 8: A F
B C
D E
H L
A F
B 60 C
D E
H L
AFTER EXECUTION BEFORE EXECUTION
MVI B60H
40
HL2050H
2051H
204FH
204FH
HL2050H
2051H
MVI M40H
BEFORE EXECUTION AFTER EXECUTION
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 9: 3 Data Transfer Instructions
• LDA 16-bit address
• The contents of a memory location specified
by a 16-bit address in the operand are
copied to the accumulator A.
• The contents of the source are not altered.
• Example: LDA 2000H
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 10: A
30
A 30
30
AFTER EXECUTION BEFORE EXECUTION
LDA 2000H
2000H
2000H
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 11: 4 Data Transfer Instructions
• LDAX Register Pair
• Load accumulator A with the contents of
memory location whose address is specified by
BC or DE or register pair.
• The contents of either the register pair or the
memory location are not altered.
• Example: LDAX D
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 12: A F
B C
D 20 E 30
A 80 F
B C
D 20 E 30
80
80
AFTER EXECUTION BEFORE EXECUTION
LDAX D
2030H
2030H
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 13: 5 Data Transfer Instructions
• STA 16-bit address
• The contents of accumulator are copied into
the memory location i.e. address specified by
the operand in the instruction.
• Example: STA 2000 H
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 14: A 50
A 50
50
AFTER EXECUTION BEFORE EXECUTION
STA 2000H
2000H
2000H
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 15: 6 Data Transfer Instructions
• STAX Register Pair
• Store the contents of accumulator A into
the memory location whose address is
specified by BC Or DE register pair.
• Example: STAX B
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 16: A 50 F
B 10 C 20
D E
A 50 F
B 10 C 20
D E
50
AFTER EXECUTION BEFORE EXECUTION
STAX B
1020H
1020H
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 17: 7 Data Transfer Instructions
• SHLD 16-bit address
• Store H-L register pair in memory.
• The contents of register L are stored into
memory location specified by the 16-bit
address.
• The contents of register H are stored into the
next memory location.
• Example: SHLD 2500 H
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 18: H 30 L 60
BEFORE EXECUTION AFTER EXECUTION
60
30
H 30 L 60
SHLD 2500H
2500H 2500H
204FH
2502H
204FH
2502H
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 19: 8 Data Transfer Instructions
• XCHG
• The contents of register H are exchanged
with the contents of register D.
• The contents of register L are exchanged with
the contents of register E.
• Example: XCHG
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 20: D 20 E 40
H 70 L 80
D 70 E 80
H 20 L 40
BEFORE EXECUTION AFTER EXECUTION
XCHG
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 21: 9 Data Transfer Instructions
• SPHL
• Move data from H-L pair to the Stack Pointer
SP
• This instruction loads the contents of H-L pair
into SP.
• Example: SPHL
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 22: H 25 L 00
SP
BEFORE EXECUTION
AFTER EXECUTION
H 25 L 00
SP 2500
SPHL
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 23: 10 Data Transfer Instructions
• XTHL
• Exchange H –L with top of stack
• The contents of L register are exchanged with
the location pointed out by the contents of the
SP.
• The contents of H register are exchanged with
the next location SP + 1.
• Example: XTHL
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 24: H
30
L
40
SP 2700
BEFORE EXECUTION
50
60
H
60
L
50
SP 2700 40
30
AFTER EXECUTION
XTHL
2700H
2701H
2702H
2700H
2701H
2702H
LSP
HSP+1
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 25: 11 Data Transfer Instructions
• PCHL
• Load program counter with H-L contents
• The contents of registers H and L are copied into
the program counter PC.
• The contents of H are placed as the high-order
byte and the contents of L as the low-order byte.
• Example: PCHL
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 26: H
60
L
00
PC
BEFORE EXECUTION AFTER EXECUTION
H
60
L
00
PC 6000
PCHL
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 27: 12 Data Transfer Instructions
• IN 8-bit port address
• Copy data to accumulator from a port with 8-
bit address.
• The contents of I/O port are copied into
accumulator.
• Example: IN 80 H
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 28: 10 A
10 A 10
BEFORE EXECUTION
AFTER EXECUTION
IN 80H
PORT 80H
PORT 80H
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 29: 13 Data Transfer Instructions
• OUT 8-bit port address
• Copy data from accumulator to a port with 8-
bit address
• The contents of accumulator are copied into
the I/O port.
• Example: OUT 50 H
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 30: 10 A 40
40 A 40
BEFORE EXECUTION
AFTER EXECUTION
OUT 50H
PORT 50H
PORT 50H
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 31: Arithematic Instructions
• These instructions perform the operations
like:
• Addition
• Subtraction
• Increment
• Decrement
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 32: 1 Arithematic Instructions
• ADD R
• ADD M
• The contents of register or memory are added to
the contents of accumulator.
• The result is stored in accumulator.
• If the operand is memory location its address is
specified by H-L pair.
• Example: ADD C or ADD M
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 33: B C 30
D E
H L
B C 30
D E
H L
AFTER EXECUTION BEFORE EXECUTION
B C
D E
H 20 L 50
B C
D E
H 20 L 50
AFTER EXECUTION BEFORE EXECUTION
A 20
A 50
A 20
A 30
ADD C
AA+R
ADD M
AA+M
10
10
2050 2050
slide 34: 2 Arithematic Instructions
• ADC R
• ADC M
• The contents of register or memory and Carry Flag
CY are added to the contents of accumulator.
• The result is stored in accumulator.
• If the operand is memory location its address is
specified by H-L pair. All flags are modified to reflect
the result of the addition.
• Example: ADC C or ADC M
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 35: B C 20
D E
H L
A 50
B C 20
D E
H L
A 71
AFTER EXECUTION BEFORE EXECUTION
ADC C
AA+R+CY
CY 1 CY 0
CY 1 CY 0
A 20 A 51
H 20 L 50 H 20 L 50
ADC M
AA+M+CY
AFTER EXECUTION BEFORE EXECUTION
30 30
2050H 2050H
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 36: 3 Arithematic Instructions
• ADI 8-bit data
• The 8-bit data is added to the contents of
accumulator.
• The result is stored in accumulator.
• Example: ADI 10 H
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 37: A 50
A 60
AFTER EXECUTION BEFORE EXECUTION
ADI 10H
AA+DATA8
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 38: 4 Arithematic Instructions
• ACI 8-bit data
• The 8-bit data and the Carry Flag CY are
added to the contents of accumulator.
• The result is stored in accumulator.
• Example: ACI 20 H
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 39: CY 1 CY 0
A 30 A 51
AFTER EXECUTION BEFORE EXECUTION
ACI 20H
AA+DATA
8+CY
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 40: 5 Arithematic Instructions
• DAD Register pair
• The 16-bit contents of the register pair are
added to the contents of H-L pair.
• The result is stored in H-L pair.
• If the result is larger than 16 bits then CY is
set.
• Example: DAD D
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 41: AFTER EXECUTION BEFORE EXECUTION
B C
D 10 E 20
H 20 L 50
SP
B C
D 10 E 20
H 30 L 70
SP
CY 0 CY 0
DAD D
HLHL+R
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 42: 6 Arithematic Instructions
• SUB R
• SUB M
• The contents of the register or memory location are
subtracted from the contents of the accumulator.
• The result is stored in accumulator.
• If the operand is memory location its address is
specified by H-L pair.
• Example: SUB B or SUB M
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 43: B 30 C
D E
H L
A 50
B 30 C
D E
H L
A 20
AFTER EXECUTION
BEFORE EXECUTION
SUB B
AA-R
AFTER EXECUTION
BEFORE EXECUTION
A 50
A 40
H
10
L
20
H
10
L
20
SUB M
AA-M
10
10
1020H
1020H
slide 44: 7 Arithematic Instructions
• SBB R
• SBB M
• The contents of the register or memory location and
Borrow Flag i.e.CY are subtracted from the contents of the
accumulator.
• The result is stored in accumulator.
• If the operand is memory location its address is specified
by H-L pair.
• Example: SBB C or SBB M
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 45: B C 20
D E
H L
A 40
CY 1
B C 20
D E
H L
A 19
CY 0
SBB C
AA-R-CY
AFTER EXECUTION
BEFORE EXECUTION
CY 1
A 50
H
20
L
50
CY 0
A 39
H
20
L
50
AFTER EXECUTION
BEFORE EXECUTION
SBB M
AA-M-CY
10
10
2050H
2050H
slide 46: 8 Arithematic Instructions
• SUI 8-bit data
• OPERATION: AA-DATA8
• The 8-bit immediate data is subtracted from
the contents of the accumulator.
• The result is stored in accumulator.
• Example: SUI 45 H
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 47: 9 Arithematic Instructions
• SBI 8-bit data
• The 8-bit data and the Borrow Flag i.e. CY is
subtracted from the contents of the
accumulator.
• The result is stored in accumulator.
• Example: SBI 20 H
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 48: CY 1
A 50
AFTER EXECUTION
BEFORE EXECUTION
CY 0
A 29
SBI 20H
AA-DATA8-CY
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 49: 10 Arithematic Instructions
• INR R
• INR M
• The contents of register or memory location are
incremented by 1.
• The result is stored in the same place.
• If the operand is a memory location its address
is specified by the contents of H-L pair.
• Example: INR B or INR M
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 50: B 10 C
D E
H L
A
B 11 C
D E
H L
A
AFTER EXECUTION BEFORE EXECUTION
H
20
L
50
H
20
L
50
30
31
2050H
2050H
AFTER EXECUTION BEFORE EXECUTION
INR M
MM+1
B 10 C
D E
H L
A
BEFORE EXECUTION
INR B
RR+1
slide 51: 11 Arithematic Instructions
• INX Rp
• The contents of register pair are incremented
by 1.
• The result is stored in the same place.
• Example: INX H
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 52: B C
D E
H 10 L 20
B C
D E
H 11 L 21
AFTER EXECUTION BEFORE EXECUTION
SP
SP
INX H
RPRP+1
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 53: 12 Arithematic Instructions
• DCR R
• DCR M
• The contents of register or memory location are
decremented by 1.
• The result is stored in the same place.
• If the operand is a memory location its address
is specified by the contents of H-L pair.
• Example: DCR E or DCR M
slide 54: B C
D E 19
H L
A
AFTER EXECUTION
B C
D E 20
H L
A
BEFORE EXECUTION
DCR E
RR-1
H
20
L
50
H
20
L
50
21
20
2050H
AFTER EXECUTION BEFORE EXECUTION
DCR M
MM-1
2050H
slide 55: 13 Arithematic Instructions
• DCX Rp
• The contents of register pair are decremented by
1.
• The result is stored in the same place.
• Example: DCX D
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 56: B C
D 10 E 20
H L
B C
D 10 E 19
H L
AFTER EXECUTION BEFORE EXECUTION
SP
SP
DCX D
RPRP-1
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 57: 1 Logical Instructions
• ANA R
• ANA M
• AND specified data in register or memory with
accumulator.
• Store the result in accumulator A.
• Example: ANA B ANA M
slide 58: B 10 C
D E
H L
A
B 0F C
D E
H L
A 0A
AFTER EXECUTION
ANA B
AA and R
B 0F C
D E
H L
A AA
BEFORE EXECUTION
CY AC CY 0 AC 1
AFTER EXECUTION BEFORE EXECUTION
CY AC
CY 0 AC 1
A 11
A 55
H 20 L 50
H 20 L 50
B3
B3
2050H
ANA M
AA and M
2050H
1010 1010AAH
0000 11110FH
0000 10100AH
0101 010155H
1011 0011B3H
0001 000111H
slide 59: 2 Logical Instructions
• ANI 8-bit data
• AND 8-bit data with accumulator A.
• Store the result in accumulator A
• Example: ANI 3FH
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 60: CY AC
A B3
AFTER EXECUTION BEFORE EXECUTION
CY 0 AC 1
A 33
ANI 3FH
AA and DATA8
1011 0011B3H
0011 11113FH
0011 001133H
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 61: 3 Logical Instructions
• XRA Register 8-bit
• XOR specified register with accumulator.
• Store the result in accumulator.
• Example: XRA C
slide 62: B 10 C
D E
H L
A
B C 2D
D E
H L
A 87
AFTER EXECUTION
XRA C
AA xor R
B C 2D
D E
H L
A AA
BEFORE EXECUTION
CY AC CY 0 AC 0
1010 1010AAH
0010 11012DH
1000 011187H
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 63: 4 Logical Instructions
• XRA M
• XOR data in memory memory location
pointed by H-L pair with Accumulator.
• Store the result in Accumulator.
• Example: XRA M
slide 64: H 20 L 50
A 55
AFTER EXECUTION
XRA M
AA xor M
BEFORE EXECUTION
CY AC CY 0 AC 0
0101 010155H
1011 0011B3H
1110 0110E6H
H 20 L 50
A E6
B3
B3
2050H 2050H
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 65: 5 Logical Instructions
• XRI 8-bit data
• XOR 8-bit immediate data with accumulator A.
• Store the result in accumulator.
• Example: XRI 39H
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 66: CY AC
A B3
AFTER EXECUTION BEFORE EXECUTION
CY 0 AC 0
A 8A
XRI 39H
AA xor DATA8
1011 0011B3H
0011 100139H
1000 10108AH
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 67: 6 Logical Instructions
• ORA Register
• OR specified register with accumulator A.
• Store the result in accumulator.
• Example: ORA B
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 68: AFTER EXECUTION BEFORE EXECUTION
CY AC
ORA B
AA or R
1010 1010AAH
0001 001012H
1011 1010BAH
B 12 C
D E
H L
A AA
B 12 C
D E
H L
A BA
CY 0 AC 0
slide 69: 7 Logical Instructions
• ORA M
• OR specified register with accumulator A.
• Store the result in accumulator.
• Example: ORA M
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 70: AFTER EXECUTION BEFORE EXECUTION
CY AC
ORA M
AA or M
0101 010155H
1011 0011B3H
1111 0111F7H
H 20 L 50
A 55
A F7
CY 0 AC 0
H 20 L 50
B3
B3
2050H 2050H
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 71: 8 Logical Instructions
• ORI 8-bit data
• OR 8-bit data with accumulator A.
• Store the result in accumulator.
• Example: ORI 08H
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 72: CY AC
A B3
AFTER EXECUTION BEFORE EXECUTION
CY 0 AC 0
A BB
ORI 08H
AA or DATA8
1011 0011B3H
0000 100008H
1011 1011BBH
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 73: 9 Logical Instructions
• CMP Register
• CMP M
• Compare specified data in register or memory
with accumulator A.
• Store the result in accumulator.
• Example: CMP D or CMP M
slide 74: B 10 C
D E
H L
A
B C
D B9 E
H L
A B8
AFTER EXECUTION
CMP D
A-R
B C
D B9 E
H L
A B8
BEFORE EXECUTION
CY Z CY 0 Z 0
AFTER EXECUTION BEFORE EXECUTION
CY Z
CY 0 Z 1
A B8 A B8
H 20 L 50 H 20 L 50
B8
B8
2050H
CMP M
A-M
2050H
AR: CY0Z0
AR: CY0Z1
AR: CY1Z0
AM: CY0Z0
AM: CY0Z1
AM: CY1Z0
slide 75: 10 Logical Instructions
• CPI 8-bit data
• Compare 8-bit immediate data with
accumulator A.
• Store the result in accumulator.
• Example: CPI 30H
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 76: CY Z
A BA
AFTER EXECUTION BEFORE EXECUTION
CY 0 AC 0
A BA
CPI 30H
A-DATA
ADATA: CY0Z0
ADATA: CY0Z1
ADATA: CY1Z0
1011 1010BAH
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 77: 11 Logical Instructions
• STC
• It sets the carry flag to 1.
• Example: STC
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 78: CY 0
AFTER EXECUTION BEFORE EXECUTION
CY 1
STC
CY1
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 79: 12 Logical Instructions
• CMC
• It complements the carry flag.
• Example: CMC
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 80: CY 1
AFTER EXECUTION BEFORE EXECUTION
CY 0
CMC
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 81: 13 Logical Instructions
• CMA
• It complements each bit of the accumulator.
• Example: CMA
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 82: 14 Logical Instructions
• RLC
• Rotate accumulator left
• Each binary bit of the accumulator is rotated left
by one position.
• Bit D7 is placed in the position of D0 as well as
in the Carry flag.
• CY is modified according to bit D7.
• Example: RLC.
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 83: B7 B6 B5 B4 B3 B2 B1 B0 CY
B6 B5 B4 B3 B2 B1 B0 B7 B7
AFTER EXECUTION
BEFORE EXECUTION
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 84: 15 Logical Instructions
• RRC
• Rotate accumulator right
• Each binary bit of the accumulator is rotated right by
one
• position.
• Bit D0 is placed in the position of D7 as well as in the
Carry flag.
• CY is modified according to bit D0.
• Example: RRC.
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 85: B7 B6 B5 B4 B3 B2 B1 B0 CY
B0 B7 B6 B5 B4 B3 B2 B1 B0
AFTER EXECUTION
BEFORE EXECUTION
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 86: 16 Logical Instructions
• RAL
• Rotate accumulator left through carry
• Each binary bit of the accumulator is rotated left
by one position through the Carry flag.
• Bit D7 is placed in the Carry flag and the Carry
flag is placed in the least significant position D0.
• CY is modified according to bit D7.
• Example: RAL.
slide 87: B7 B6 B5 B4 B3 B2 B1 B0 CY
B6 B5 B4 B3 B2 B1 B0 CY B7
AFTER EXECUTION
BEFORE EXECUTION
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 88: 17 Logical Instructions
• RAR
• Rotate accumulator right through carry
• Each binary bit of the accumulator is rotated left
by one position through the Carry flag.
• Bit D7 is placed in the Carry flag and the Carry
flag is placed in the least significant position D0.
• CY is modified according to bit D7.
• Example: RAR
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 89: B7 B6 B5 B4 B3 B2 B1 B0 CY
CY B7 B6 B5 B4 B3 B2 B1 B0
AFTER EXECUTION
BEFORE EXECUTION
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 90: Concept of Subroutine
• In 8085 microprocessor a subroutine is a
separate program written aside from main
program this program is basically the program
which requires to be executed several times in
the main program.
• The microprocessor can call subroutine any time
using CALL instruction. after the subroutine is
executed the subroutine hands over the
program to main program using RET instruction.
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 91: Branching Instructions
• The branch group instructions allows the
microprocessor to change the sequence of
program either conditionally or under certain
test conditions. The group includes
• 1 Jump instructions
• 2 Call and Return instructions
• 3 Restart instructions
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 92: 1 Branching Instructions
• JUMP ADDRESS
• BEFORE EXECUTION AFTER EXECUTION
• Jump unconditionally to the address.
• The instruction loads the PC with the address
given within the instruction and resumes the
program execution from specified location.
• Example: JMP 200H
PC PC 2000
JMP 2000H
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 93: Conditional Jumps
Instruction Code Decription Condition For Jump
JC Jump on carry CY1
JNC Jump on not carry CY0
JP Jump on positive S0
JM Jump on minus S1
JPE Jump on parity even P1
JPO Jump on parity odd P0
JZ Jump on zero Z1
JNZ Jump on not zero Z0
slide 94: 2 Branching Instructions
• CALL address
• Call unconditionally a subroutine whose
starting address given within the
instruction and used to transfer program
control to a subprogram or subroutine.
• Example: CALL 2000H
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 95: Conditional Calls
Instruction Code Description Condition for CALL
CC Call on carry CY1
CNC Call on not carry CY0
CP Call on positive S0
CM Call on minus S1
CPE Call on parity even P1
CPO Call on parity odd P0
CZ Call on zero Z1
CNZ Call on not zero Z0
slide 96: 3 Branching Instructions
• RET
• Return from the subroutine unconditionally.
• This instruction takes return address from the
stack and loads the program counter with
this address.
• Example: RET
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 97: SP 27FD
PC
00
62
SP 27FF
PC 6200
00
62
AFTER EXECUTION BEFORE EXECUTION
RET
27FFH
27FEH
27FDH
27FFH
27FEH
27FDH
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 98: 4 Branching Instructions
• RST n
• Restart n 0 to 7
• This instruction transfers the program control
to a specific memory address. The processor
multiplies the RST number by 8 to calculate
the vector address.
• Example: RST 6
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 99: SP 3000
PC 2000
SP 2999
PC 0030
01
20
AFTER EXECUTION BEFORE EXECUTION
RST 6
3000H
2FFFH
2FFEH
SP-1
ADDRESS OF THE NEXT INSTRUCTION IS 2001H
3000H
2FFFH
2FFEH
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 100: Vector Address For Return
Instructions
Instruction Code Vector Address
RST 0 080000H
RST 1 080008H
RST 2 080010H
RST 3 080018H
RST 4 080020H
RST 5 080028H
RST 6 080030H
Rst 7 080038H
slide 101: 1 Control Instructions
• NOP
• No operation
• No operation is performed.
• The instruction is fetched and decoded but no
operation is executed.
• Example: NOP
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 102: 2 Control Instructions
• HLT
• Halt
• The CPU finishes executing the current
instruction and halts any further execution.
• An interrupt or reset is necessary to exit from
the halt state.
• Example: HLT
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 103: 3 Control Instructions
• RIM
• Read Interrupt Mask
• This is a multipurpose instruction used to read the
status of interrupts 7.5 6.5 5.5 and read serial data
input bit.
• The instruction loads eight bits in the accumulator
with the following interpretations.
• Example: RIM
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
slide 104: RIM INSTRUCTION
slide 105: • SIM
• Set Interrupt Mask
• This is a multipurpose instruction and used to
implement the 8085 interrupts 7.5 6.5 5.5 and
serial data output.
• The instruction interprets the accumulator
contents as follows.
• Example: SIM
slide 106: SIM Instruction
Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in
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Microprocessor Notes by Er. Swapnil V. Kaware svkawareyahoo.co.in