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1 Digital Data Communications Techniques




3 DIGITAL  DATA  COMMUNICATIONS TECHNIQUES Data  signals  transmitted  over  communications channels need to follow specific protocols to ensure they   are  synchronized.  In  normal  I/O  data  exchanges, this process is accomplished by the system of requests and acknowledges. In addition, the data signals have to be properly formatted for the receiving computer to decode  them  properly.

Asynchronous and Synchronous Transmission:

4 Asynchronous and Synchronous Transmission Timing problems require a mechanism to synchronize the transmitter and receiver Two solutions Asynchronous – each character is treated independent Synchronous – data sent in formatted blocks with some form of synchronization


5 Asynchronous Data transmitted on character at a time 5 to 8 bits Timing only needs maintaining within each character (e.g. the bits) Resynchronize with each character

Asynchronous (diagram):

6 Asynchronous (diagram)

Asynchronous - Behavior:

7 Asynchronous - Behavior In a steady stream, interval between characters is uniform (length of stop element) In idle state, receiver looks for transition 1 to 0 Then samples next seven intervals (char length) Then looks for next 1 to 0 for next char Simple Cheap Overhead of 2 or 3 bits per char (~20%) Good for data with large gaps (keyboard)

Synchronous - Bit Level:

8 Synchronous - Bit Level Block of data transmitted without start or stop bits Clocks must be synchronized Can use separate clock line Good over short distances Subject to impairments Embed clock signal in data Manchester encoding Carrier frequency (analog)

Synchronous - Block Level:

9 Synchronous - Block Level Need to indicate start and end of block Use pre-amble and post-amble e.g. series of SYN (hex 16) characters e.g. block of 11111111 patterns ending in 11111110 More efficient (lower overhead) than async

Synchronous (diagram):

10 Synchronous (diagram)

Types of Error:

11 Types of Error An error occurs when a bit is altered between transmission and reception Single bit errors One bit altered Adjacent bits not affected White noise Burst errors Contiguous sequence of B bits in which first last and any number of intermediate bits in error Impulse noise Fading in wireless Effect greater at higher data rates

Error Detection:

12 Error Detection Additional bits added by transmitter for error detection code Parity Value of parity bit is such that character has even (even parity) or odd (odd parity) number of ones Even number of bit errors goes undetected Old format Applied to each character

Cyclic Redundancy Check:

13 Cyclic Redundancy Check Applies algorithm to block of data Transmit block plus remainder value of algorithm Receiver applies same algorithms to data and checks remainder value For math, see Stallings chapter 6

Error Correction:

14 Error Correction Correction of detected errors usually requires data block to be retransmitted (see chapter 7) Not appropriate for wireless applications Bit error rate is high Lots of retransmissions Propagation delay can be long (satellite) compared with frame transmission time Would result in retransmission of frame in error plus many subsequent frames Need to correct errors on basis of bits received

Working of Error Correction:

15 Working of Error Correction Add redundancy to transmitted message Can deduce original in face of certain level of error rate

Line Configuration:

16 Line Configuration Topology Physical arrangement of stations on medium Point to point Multi point Computer and terminals, local area network Half duplex Only one station may transmit at a time Requires one data path Full duplex Simultaneous transmission and reception between two stations Requires two data paths (or echo canceling)

Traditional Configurations:

17 Traditional Configurations

Characteristics of Interface:

18 Characteristics of Interface Mechanical Connection plugs Electrical Voltage, timing, encoding Functional Data, control, timing, grounding Procedural Sequence of events

Functional Specification:

19 Functional Specification Circuits grouped in categories Data Control Timing Ground One circuit in each direction Full duplex Two secondary data circuits Allow halt or flow control in half duplex operation (See table in Stallings chapter 6)

Foreground Reading:

20 Foreground Reading Stallings chapter 6 Web pages from ITU-T on v. specification Web pages on ISDN

Chapter 6 Review Questions:

21 Chapter 6 Review Questions How is the transmission of a single character differentiated from the next character in asynchronous transmission; in synchronous transmission? Compare and contrast synchronous and asynchronous transmission What is a parity bit? What is a CRC? Why would you expect a CRC to detect more errors than parity? Why is forward error correction rarely employed? What is the significance of half duplex vs. full duplex lines? Discuss the difference between a circuit and a channel Discuss the advantages of full duplex transmission

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