low power uart device

LOW POWER UART DEVICE FOR SERIAL DATA COMMUNICATION:

LOW POWER UART DEVICE FOR SERIAL DATA COMMUNICATION PARNAB CHAKRABORTY COMPUTER SCIENCE & ENGG

A G E N D A:

A G E N D A What is an UART ? Block Diagram Receiver Transmitter Register set overview Applications

HISTORY OF UART:

HISTORY OF UART 􀂄 Need: A mean to connect peripherals RS-232 􀃙 Serial Port 􀃙 UART 􀂄 First Applications: Teletypes or Visual Display Units (VDU), Printers and Modems 􀂄 8250: The first “PC” UART made by National 􀂄 UART Evolution : 􀂄 8250 16450 16550 16C650A 16C850 􀂄 Driven by Modem speeds, later by other applications. 􀂄 Currently: sophisticated devices with numerous features

What is an UART ?:

What is an UART ? Universal Asynchronous Receiver & Transmitter UART is an important device for serial data communication which helps to communicate CPU with low speed peripherals like keyboards, mouse etc without synchronizing .

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TYPES OF U A R T UART 1 Channel UART Dual UART/DUART 2 Channel UART Quad UART/QUART 4 Channel UART Octal UART 8 Channel UART SERIAL TO CPU INTERFACE Parallel to Serial conversion Serial to Parallel conversion

BLOCK DIAGRAM:

BLOCK DIAGRAM

SERIAL PORT INTERFACE:

SERIAL PORT INTERFACE I/O PORTS 3 OUTPUTS 5 INPUTS SERIAL INTERFACE TXD & RXD for data transfer RTS & CTS for flow control or general purpose output and input respectively. DTR or general purpose output. DSR,DCD & RI ,or general purpose input

8 BIT CPU INTERFACE:

8 BIT CPU INTERFACE INTEL BUS MODE CS # IR # /IOW # Address Data INT MOTOROLLA BUS MODE CS# Read/Write # Address Data IRQ#

TIMING & BUAD RATE GENERATOR:

TIMING & BUAD RATE GENERATOR Cry stal or External Clock Standard Clock Frequencies # 1.8432 MHz, 3,6864 MHz, 7.3728 MHz # 14.7456 MHz, 18.432 MHz, 22.1114MHz 16 X Timing for internal operation Standard Data Rates 110 to 921.6 Kbps Baud Rate Calculation Baud Rate = (Clock Frequency/16)/(Divisor)

RECEIVER:

RECEIVER Serial to Parallel Conversion. Receive (RX) FIFO & Receive Shift Register (RSR) with error tags. 16X timing clock for mid bit sampling & verification. Start bit detection & verification. Data-Bit sampling. Parity sampling & verification ( parity error ) Stop-Bit sampling & verification Framing check & error reports. FIFO status report (RXRDY,INT).

TRANSMITTER:

TRANSMITTER Parallel to Serial Conversion Transmitter (TX) FIFO , Transmitter Shift Register (TSR). 16X timing for bit shifting. Character Framing. Parity Insertion. FIFO empty report (TXRDY,INT).

USING THE UART:

USING THE UART Above is the UART data format which has a block of 11 bits 1 leading low start bit: Indicating the start of data transmission. 1 trailing high stop bit: Indicating the end of data transmission. 1 parity bit: Checks for error if any by the receiver. 8 data bits.

REGISTER SET OVERVIEW:

REGISTER SET OVERVIEW THR-Transmit Holding Register (write only) Loads data to be transmitted into TX FIFO. RHR-Receive Holding Register (read only) Reads out received data from RX FIFO . IER-Interrupt Enable Register (read/write) Enable or Disable Interrupt . ISR- Interrupt Status Register (read only) Highest priority pending interrupt . FCR-FIFO Control Register (write only) FIFO enable, FIFO reset, FIFO trigger level selection LCR-Line Control Register (read/write) word length, stop bit length, parity selection, break, divisor latch

Cont’d…………:

Cont’d………… MSR-Modem Status Register (read only) State of modem inputs and it’s changes since last read SPR-Scratch Pad Register (read/write) General purpose Read/Write Register DLL & DLM (read/write) DLL(LSB) DLM(MSB) is 16 bit divisor for internal baud rate generator

LOW POWER OPERATION:

LOW POWER OPERATION

MARKET APPLICATION:

MARKET APPLICATION INDUSTRIAL APPLICATION THIN CLIENT/ TERMINAL SERVER Cost effective, Low maintenance, More flexible & Reliable

TELECOMUNICATION APPLICATION Remote Access Server:

TELECOMUNICATION APPLICATION Remote Access Server

Point Of Sale System:

Point Of Sale System POS SYSTEM WITH 8 TO 32 RS 232/485 PORTS VENDING SYSTEMS

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THANK YOU VERY MUCH FOR YOUR PRECIOUS TIME.