# Digital Fundamentals 10th_ch 5

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Digital Fundamentals 10th

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Digital Fundamentals Tenth Edition Floyd Chapter 5 © 2008 Pearson Education

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In Sum-of-Products (SOP) form, basic combinational circuits can be directly implemented with AND-OR combinations if the necessary complement terms are available. Summary Combinational Logic Circuits

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Summary An example of an SOP implementation is shown. The SOP expression is an AND-OR combination of the input variables and the appropriate complements. Combinational Logic Circuits SOP DE ABC A B C E D X = ABC + DE

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When the output of a SOP form is inverted, the circuit is called an AND-OR-Invert circuit. The AOI configuration lends itself to product-of-sums (POS) implementation. Summary An example of an AOI implementation is shown. The output expression can be changed to a POS expression by applying DeMorgan’s theorem twice. Combinational Logic Circuits POS DE ABC A B C E D X = ABC + DE X = ABC + DE X = ( A + B + C )( D + E ) X = ( ABC )( DE ) AOI DeMorgan

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The truth table for an exclusive-OR gate is Summary Exclusive-OR Logic A B Notice that the output is HIGH whenever A and B disagree . The Boolean expression is The circuit can be drawn as X Symbols: Distinctive shape Rectangular outline X = AB + AB

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The truth table for an exclusive-NOR gate is Summary Exclusive-NOR Logic A B Notice that the output is HIGH whenever A and B agree . The Boolean expression is The circuit can be drawn as X Symbols: Distinctive shape Rectangular outline X = AB + AB

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Summary For each circuit, determine if the LED should be on or off. (a) (b) (c) Circuit (a): XOR, inputs agree, output is LOW, LED is ON. Circuit (b): XNOR, inputs disagree, output is LOW, LED is ON. Circuit (c): XOR, inputs disagree, output is HIGH, LED is OFF. Example Solution

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Implementing a SOP expression is done by first forming the AND terms; then the terms are ORed together. Summary Implementing Combinational Logic Example Solution Show the circuit that will implement the Boolean expression X = ABC + ABD + BDE. (Assume that the variables and their complements are available.) C A B E D B A B D Start by forming the terms using three 3-input AND gates. Then combine the three terms using a 3-input OR gate. X = ABC + ABD + BDE

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For basic combinational logic circuits, the Karnaugh map can be read and the circuit drawn as a minimum SOP. Summary Karnaugh Map Implementation Example Solution A Karnaugh map is drawn from a truth table. Read the minimum SOP expression and draw the circuit. 1. Group the 1’s into two overlapping groups as indicated. Read each group by eliminating any variable that changes across a boundary. B changes across this boundary C changes across this boundary The vertical group is read A C . The horizontal group is read AB . The circuit is on the next slide:

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Summary Circuit: C A A C A + A B Solution continued… X = The result is shown as a sum of products. It is a simple matter to implement this form using only NAND gates as shown in the text and following example. B

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Summary NAND Logic Example Convert the circuit in the previous example to one that uses only NAND gates. Recall from Boolean algebra that double inversion cancels. By adding inverting bubbles to above circuit, it is easily converted to NAND gates: C A B A C A + A B X = Solution

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Summary NAND gates are sometimes called universal gates because they can be used to produce the other basic Boolean functions. Universal Gates Inverter A A AND gate A B AB A B A + B OR gate A B A + B NOR gate

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Summary NOR gates are also universal gates and can form all of the basic gates. Universal Gates Inverter A A OR gate A B A + B A B AB AND gate A B AB NAND gate

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Summary Recall from DeMorgan’s theorem that AB = A + B . By using equivalent symbols, it is simpler to read the logic of SOP forms. The earlier example shows the idea: NAND Logic C A B A C A + A B X = The logic is easy to read if you (mentally) cancel the two connected bubbles on a line.

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Summary NOR Logic B A C A X = Again, the logic is easy to read if you cancel the two connected bubbles on a line. Alternatively, DeMorgan’s theorem can be written as A + B = A B . By using equivalent symbols, it is simpler to read the logic of POS forms. For example, ( A + B )( A + C )

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Summary Pulsed Waveforms For combinational circuits with pulsed inputs, the output can be predicted by developing intermediate outputs and combining the result. For example, the circuit shown can be analyzed at the outputs of the OR gates: A B C D A B C D G 1 G 2 G 3 G 1 G 2 G 3

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Summary Pulsed Waveforms Alternatively, you can develop the truth table for the circuit and enter 0’s and 1’s on the waveforms. Then read the output from the table. A B C D A B C D G 1 G 2 G 3 G 3 Inputs A B C D Output 0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1 1 0 0 0 1 0 0 1 1 0 1 0 1 0 1 1 1 1 0 0 1 1 0 1 1 1 1 0 1 1 1 1 0 1 0 1 0 1 0 1 0 1 0 1 1 0 0 1 1 0 0 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 1 1 1 0 1 0 X 0 1 1 1 0 1 1 1 0 0 0 0 0 1 1 1

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Selected Key Terms Universal gate Negative-OR Negative-AND Either a NAND or a NOR gate. The term universal refers to a property of a gate that permits any logic function to be implemented by that gate or by a combination of gates of that kind. The dual operation of a NAND gate when the inputs are active-LOW. The dual operation of a NOR gate when the inputs are active-LOW.

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© 2008 Pearson Education Quiz 1. Assume an AOI expression is AB + CD . The equivalent POS expression is a. ( A + B )( C + D ) b. ( A + B )( C + D ) c. ( A + B )( C + D ) d. none of the above

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2. The truth table shown is for a. a NAND gate b. a NOR gate c. an exclusive-OR gate d. an exclusive-NOR gate © 2008 Pearson Education Quiz

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3. An LED that should be ON is a. LED-1 b. LED-2 c. neither d. both © 2008 Pearson Education Quiz

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© 2008 Pearson Education Quiz 4. To implement the SOP expression , the type of gate that is needed is a a. 3-input AND gate b. 3-input NAND gate c. 3-input OR gate d. 3-input NOR gate X = ABC + ABD + BDE C A B E D B A B D

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© 2008 Pearson Education Quiz 5. Reading the Karnaugh map, the logic expression is a. A C + A B b. A B + A C c. A B + B C d. A B + A C

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6. The circuit shown will have identical logic out if all gates are changed to a. AND gates b. OR gates c. NAND gates d. NOR gates © 2008 Pearson Education Quiz A B C D

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7. The two types of gates which are called universal gates are a. AND/OR b. NAND/NOR c. AND/NAND d. OR/NOR © 2008 Pearson Education Quiz

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8. The circuit shown is equivalent to an a. AND gate b. XOR gate c. OR gate d. none of the above © 2008 Pearson Education Quiz A B

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9. The circuit shown is equivalent to a. an AND gate b. an XOR gate c. an OR gate d. none of the above © 2008 Pearson Education Quiz A B

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10. During the first three intervals for the pulsed circuit shown, the output of a. G 1 is LOW and G 2 is LOW b. G 1 is LOW and G 2 is HIGH c. G 1 is HIGH and G 2 is LOW d. G 1 is HIGH and G 2 is HIGH © 2008 Pearson Education Quiz A B C D A B C D G 1 G 2 G 3

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Answers: 1. b 2. d 3. a 4. c 5. d 6. c 7. b 8. c 9. a 10. c Quiz