Microcontroller 8051

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Slide 1: 

Microcontroller 8051

Contents: : 

Contents: Introduction Block Diagram and Pin Description of the 8051 Registers Memory mapping in 8051 Stack in the 8051 I/O Port Programming Timer Interrupt

Why do we need to learn Microprocessors/controllers? : 

Why do we need to learn Microprocessors/controllers? The microprocessor is the core of computer systems. Nowadays many communication, digital entertainment, portable devices, are controlled by them. A designer should know what types of components he needs, ways to reduce production costs and product reliable.

Different aspects of a microprocessor/controller : 

Different aspects of a microprocessor/controller Hardware :Interface to the real world Software :order how to deal with inputs

The necessary tools for a microprocessor/controller : 

The necessary tools for a microprocessor/controller CPU: Central Processing Unit I/O: Input /Output Bus: Address bus & Data bus Memory: RAM & ROM Timer Interrupt Serial Port Parallel Port

Microprocessors: : 

CPU General-Purpose Micro-processor RAM ROM I/O Port Timer Serial COM Port Data Bus Address Bus General-Purpose Microprocessor System Microprocessors: CPU for Computers No RAM, ROM, I/O on CPU chip itself Example:Intel’s x86, Motorola’s 680x0 Many chips on mother’s board General-purpose microprocessor

Slide 7: 

RAM ROM I/O Port Timer Serial COM Port Microcontroller CPU A smaller computer On-chip RAM, ROM, I/O ports... Example:Motorola’s 6811, Intel’s 8051, Zilog’s Z8 and PIC 16X A single chip Microcontroller :

Slide 8: 

Microprocessor CPU is stand-alone, RAM, ROM, I/O, timer are separate designer can decide on the amount of ROM, RAM and I/O ports. expansive versatility general-purpose Microcontroller CPU, RAM, ROM, I/O and timer are all on a single chip fix amount of on-chip ROM, RAM, I/O ports for applications in which cost, power and space are critical single-purpose Microprocessor vs. Microcontroller

Slide 9: 

Embedded system means the processor is embedded into that application. An embedded product uses a microprocessor or microcontroller to do one task only. In an embedded system, there is only one application software that is typically burned into ROM. Example:printer, keyboard, video game player Embedded System

Slide 10: 

meeting the computing needs of the task efficiently and cost effectively speed, the amount of ROM and RAM, the number of I/O ports and timers, size, packaging, power consumption easy to upgrade cost per unit availability of software development tools assemblers, debuggers, C compilers, emulator, simulator, technical support wide availability and reliable sources of the microcontrollers. Three criteria in Choosing a Microcontroller

Block Diagram : 

Block Diagram CPU On-chip RAM On-chip ROM for program code 4 I/O Ports Timer 0 Serial Port OSC Interrupt Control External interrupts Timer 1 Timer/Counter Bus Control TxD RxD P0 P1 P2 P3 Address/Data Counter Inputs

Slide 13: 

Pin Description of the 8051 

Pins of 8051(1/4) : 

Pins of 8051(1/4) Vcc(pin 40): Vcc provides supply voltage to the chip. The voltage source is +5V. GND(pin 20):ground XTAL1 and XTAL2(pins 19,18)

Slide 15: 

Figure (a). XTAL Connection to 8051 Using a quartz crystal oscillator We can observe the frequency on the XTAL2 pin. 

Pins of 8051(2/4) : 

Pins of 8051(2/4) RST(pin 9):reset It is an input pin and is active high(normally low). The high pulse must be high at least 2 machine cycles. It is a power-on reset. Upon applying a high pulse to RST, the microcontroller will reset and all values in registers will be lost. Reset values of some 8051 registers 

Figure (b). Power-On RESET Circuit : 

Figure (b). Power-On RESET Circuit 30 pF 30 pF 8.2 K 10 uF + Vcc 11.0592 MHz EA/VPP X1 X2 RST 31 19 18 9 

Pins of 8051(3/4) : 

Pins of 8051(3/4) /EA(pin 31):external access There is no on-chip ROM in 8031 and 8032 . The /EA pin is connected to GND to indicate the code is stored externally. /PSEN & ALE are used for external ROM. For 8051, /EA pin is connected to Vcc. “/” means active low. /PSEN(pin 29):program store enable This is an output pin and is connected to the OE pin of the ROM.

Pins of 8051(4/4) : 

Pins of 8051(4/4) ALE(pin 30):address latch enable It is an output pin and is active high. 8051 port 0 provides both address and data. The ALE pin is used for de-multiplexing the address and data by connecting to the G pin of the 74LS373 latch. I/O port pins The four ports P0, P1, P2, and P3. Each port uses 8 pins. All I/O pins are bi-directional.

Pins of I/O Port : 

Pins of I/O Port The 8051 has four I/O ports Port 0 (pins 32-39):P0(P0.0~P0.7) Port 1(pins 1-8) :P1(P1.0~P1.7) Port 2(pins 21-28):P2(P2.0~P2.7) Port 3(pins 10-17):P3(P3.0~P3.7) Each port has 8 pins. Named P0.X (X=0,1,...,7), P1.X, P2.X, P3.X Ex:P0.0 is the bit 0(LSB)of P0 Ex:P0.7 is the bit 7(MSB)of P0 These 8 bits form a byte. Each port can be used as input or output (bi-direction). 

Hardware Structure of I/O Pin : 

Hardware Structure of I/O Pin Each pin of I/O ports Internal CPU bus:communicate with CPU A D latch store the value of this pin D latch is controlled by “Write to latch” Write to latch=1:write data into the D latch 2 Tri-state buffer: TB1: controlled by “Read pin” Read pin=1:really read the data present at the pin TB2: controlled by “Read latch” Read latch=1:read value from internal latch A transistor M1 gate Gate=0: open Gate=1: close

D Latch: : 

D Latch:

A Pin of Port 1 : 

A Pin of Port 1 8051 IC P0.x

Writing “1” to Output Pin P1.X : 

Writing “1” to Output Pin P1.X 8051 IC 2. output pin is Vcc 1. write a 1 to the pin 1 0 output 1 TB1 TB2

Writing “0” to Output Pin P1.X : 

Writing “0” to Output Pin P1.X 8051 IC 2. output pin is ground 1. write a 0 to the pin 0 1 output 0 TB1 TB2

Reading “High” at Input Pin : 

Reading “High” at Input Pin 8051 IC 2. MOV A,P1 external pin=High write a 1 to the pin MOV P1,#0FFH 1 0 3. Read pin=1 Read latch=0 Write to latch=1 1 TB1 TB2

Reading “Low” at Input Pin : 

Reading “Low” at Input Pin 8051 IC 2. MOV A,P1 external pin=Low write a 1 to the pin MOV P1,#0FFH 1 0 3. Read pin=1 Read latch=0 Write to latch=1 0 TB1 TB2

Other Pins : 

Other Pins P1, P2, and P3 have internal pull-up resisters. P1, P2, and P3 are not open drain. P0 has no internal pull-up resistors and does not connects to Vcc inside the 8051. P0 is open drain. Compare the figures of P1.X and P0.X.  However, for a programmer, it is the same to program P0, P1, P2 and P3. All the ports upon RESET are configured as output.

A Pin of Port 0 : 

A Pin of Port 0 8051 IC P1.x

Port 0 with Pull-Up Resistors : 

Port 0 with Pull-Up Resistors

Port 3 Alternate Functions : 

Port 3 Alternate Functions 

RESET Value of Some 8051 Registers: : 

RESET Value of Some 8051 Registers: 0000 DPTR 0007 SP 0000 PSW 0000 B 0000 ACC 0000 PC Reset Value Register RAM are all zero. 

Slide 33: 

Registers

Memory mapping in 8051 : 

Memory mapping in 8051 ROM memory map in 8051 family 4k DS5000-32 8k 32k from Atmel Corporation from Dallas Semiconductor

Slide 35: 

RAM memory space allocation in the 8051

Stack in the 8051 : 

Stack in the 8051 The register used to access the stack is called SP (stack pointer) register. The stack pointer in the 8051 is only 8 bits wide, which means that it can take value 00 to FFH. When 8051 powered up, the SP register contains value 07.

Timer : : 

Timer :

TMOD Register: : 

TMOD Register: Gate : When set, timer only runs while INT(0,1) is high. C/T : Counter/Timer select bit. M1 : Mode bit 1. M0 : Mode bit 0.

TCON Register: : 

TCON Register: TF1: Timer 1 overflow flag. TR1: Timer 1 run control bit. TF0: Timer 0 overflag. TR0: Timer 0 run control bit. IE1: External interrupt 1 edge flag. IT1: External interrupt 1 type flag. IE0: External interrupt 0 edge flag. IT0: External interrupt 0 type flag.

Interrupt : : 

Interrupt :

Interrupt Enable Register : : 

Interrupt Enable Register : EA : Global enable/disable. --- : Undefined. ET2 :Enable Timer 2 interrupt. ES :Enable Serial port interrupt. ET1 :Enable Timer 1 interrupt. EX1 :Enable External 1 interrupt. ET0 : Enable Timer 0 interrupt. EX0 : Enable External 0 interrupt.