SRS Movie

Slide 1: 

6. Channel 1 Interrupt Processing COM DPR to MPB Channel 1 Channel 2 Interrupt Processing Channel 2 MPB Sync Interrupt Processing on the COM COM DPR from MPB MPB Bus Data Processing 2. 3. 4. 5. 8. 9. 10. 13. 14. 13. 14. 15. 16. 3.5 ms 14 ms 14 ms 14 ms 7. 12. 11. MPB Sync to COM 19 ms 18. 17. 19 ms 19 ms 3.5 ms 3.5 ms 1.

Slide 2: 

MPB Sync to COM Channel 1 Interrupt Processing COM DPR to MPB Channel 1 Channel 2 Interrupt Processing Channel 2 MPB Sync Interrupt Processing on the COM MPB Bus Data Processing 1. 2. 14 ms COM DPR from MPB 4. 3. 14 ms 14 ms 19 ms 5. 19 ms 19 ms 3.5 ms 3.5 ms 3.5 ms

Slide 3: 

Channel 1 Interrupt Processing COM DPR to MPB Channel 1 Channel 2 Interrupt Processing Channel 2 MPB Sync Interrupt Processing on the COM COM DPR from MPB MPB Bus Data Processing 1. 20 ms 20 ms 3. 2. 4. 14 ms 14 ms 14 ms MPB Sync to COM 19 ms 19 ms 19 ms 3.5 ms 3.5 ms 3.5 ms

Slide 4: 

9. 2. Channel 1 Interrupt Processing COM DPR to MPB Channel 1 Channel 2 Interrupt Processing Channel 2 COM DPR from MPB MPB Bus Data Processing 1. 6. 8. 10. 12. 13. 13. MPB Sync to COM 18 ms 16. 10 ms 15. 4 ms 3. 5. MPB Sync Interrupt Processing on the COM 4. 7. 11. 12. 18 ms 10 ms 4 ms 18 ms 10 ms 4 ms 14. 17.

Slide 5: 

Channel 1 Interrupt Processing COM DPR to MPB Channel 1 Channel 2 Interrupt Processing Channel 2 COM DPR from MPB MPB Bus Data Processing 27 ms 2. 3. MPB Sync to COM 10 ms 18 ms 10 ms 4 ms 4. 27 ms >20 ms 4. 4 ms 5. 18 ms 10 ms 4 ms 1. MPB Sync Interrupt Processing on the COM 18 ms 20 < x < 27 ms

Slide 6: 

Channel 1 Interrupt Processing COM DPR to MPB Channel 1 Channel 2 Interrupt Processing Channel 2 COM DPR from MPB MPB Bus Data Processing 1. MPB Sync to COM 18 ms 10 ms 4 ms MPB Sync Interrupt Processing on the COM 18 ms 10 ms 4 ms 18 ms 10 ms 4 ms 2.

Slide 7: 

Channel 1 Interrupt Processing COM DPR to MPB Channel 1 Channel 2 Interrupt Processing Channel 2 COM Scheduler COM DPR from MPB MPB Bus Data Processing 5 ms 20 ms 20 ms 2. 3. 10. 5 ms 1. 4. 5 ms 5. MPB Sync to COM Counter 2 19 ms 12 ms 12 ms 12 ms 7. 6. 19 ms 19 ms 8. 9. 11.

Slide 8: 

4 ms Channel 1 Interrupt Processing COM DPR to MPB Channel 1 Channel 2 Interrupt Processing Channel 2 COM Scheduler COM DPR from MPB MPB Bus Data Processing 1. 4. 2. 3. 20 > x < 27 ms MPB Sync to COM Counter 2 10 ms 18 ms 5. 18 ms 10 ms 4 ms 6. 7. 8.

Slide 9: 

INITIALISATION 1 State INITIALISATION 2 State OPERATIONAL State Upon Command from MPB to GO OPERATIONAL the COM changes to the OPERATIONAL State, and enables all interrupts. MPB and COM Perform Co-ordinated DPR BIT MPB COM COM Performs Initialisation BIT and Initialises software Upon successful completion of the handshaking phase of synchronisation with the MPB, the COM changes to the INITIALISATION 2 State, and enables the COM DPR Interrupt. MPB Performs Initialisation BIT on COM DPR MPB Sends Init Complete command to the COM. Synchronisation is complete An explanation pointer A DPR command resulting in an interrupt A state transition Upon reception of the Init Complete command the COM writes the RT addresses into DPR. COM Sends RT Address command to the MPB.

Slide 10: 

0. 1. 4. MPB Requests a New Minor Cycle Number of 4 Previous Minor Cycle Nr is 0 Current Minor Cycle Nr is 1 Next Minor Cycle Nr is 2 Previous Minor Cycle Nr is 15 Current Minor Cycle Nr is 0 Next Minor Cycle Nr is 1 COM Processing COM Command to MPB MPB Command to COM 1553 Bus (BC) DPR Interrupt An explanation pointer Cyclic Frame and Minor Cycle Management is scheduled in the Sync Interrupt from the MPB to update the previous, current and next minor cycle number and major frame of both channels. Minor Cycle Number in Synchronise with Data Word Mode Command Previous Minor Cycle Nr is 1 Current Minor Cycle Nr is 4 Next Minor Cycle Nr is 5 Next Frame and Minor Cycle Management is scheduled in the Counter 1 ISR on a request from the MPB to update the next major frame and minor cycle number of both channels. MPB Synchronization Clock Interrupt Previous Minor Cycle Nr is 0 Current Minor Cycle Nr is 1 Next Minor Cycle Nr is 4 Counter 1 ISR

Slide 11: 

Communications Board LIFT_COM CSCI Code Flash Data RAM QUART I/O Ports PowerPC 603e PIC Timers BCR 1553 Bus Interface Main Processor Board Host PC Dual Port RAM Interface RS422 Interface Memory Mapped Registers Software Interface LIFT SRU specific COM CSCI

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OFF INITIALISATION 1 OPERATIONAL 1 2 4 FAILED INITIALISATION 2 10

Slide 13: 

Channel 1 Interrupt Processing COM DPR to MPB Channel 1 Channel 2 Interrupt Processing Channel 2 MPB Sync Interrupt Processing on the COM COM DPR from MPB MPB Bus Data Processing 20 ms 20 ms 3. 14 ms 14 ms 14 ms MPB Sync to COM Counter 2 19 ms 19 ms 19 ms 1. 2. 3.5 ms 3.5 ms 3.5 ms

Slide 14: 

7. Channel 1 Interrupt Processing COM DPR to MPB Channel 1 Channel 2 Interrupt Processing Channel 2 MPB Sync Interrupt Processing on the COM COM DPR from MPB MPB Bus Data Processing 3. 2. 4. 9. 10. 11. 14. 15. 16. 17. 8. 13. 12. MPB Sync to COM 21. 20. 1. 5. 6. 18. 19. 3 ms 12 ms 18 ms 3 ms 12 ms 18 ms 3 ms 12 ms 18 ms

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0. COM Processing 4. 1553 Bus (RT) An explanation pointer Current Minor Cycle Number and Major frame in Synchronise with Data Word Mode Command Next Frame and Minor Cycle Number Management is scheduled in the Counter 0 Interrupt to update the next minor cycle number and major frame of both channels. Previous Minor Cycle Nr is 14 Current Minor Cycle Nr is 15 Next Minor Cycle Nr is 0 Cyclic Frame and Minor Cycle Number Management is scheduled in the MPB Synchronisation Clock Interrupt to update the previous, current and next minor cycle number and major frame of both channels. Previous Minor Cycle Nr is 15 Current Minor Cycle Nr is 0 Next Minor Cycle Nr is 1 Previous Minor Cycle Nr is 15 Current Minor Cycle Nr is 0 Next Minor Cycle Nr is 1 Previous Minor Cycle Nr is 0 Current Minor Cycle Nr is 1 Next Minor Cycle Nr is 2 Previous Minor Cycle Nr is 0 Current Minor Cycle Nr is 1 Next Minor Cycle Nr is 4 Previous Minor Cycle Nr is 1 Current Minor Cycle Nr is 4 Next Minor Cycle Nr is 5 MPB may not request a New Minor Cycle COM Command to MPB MPB Command to COM DPR Interrupt MPB Synchronization Clock Interrupt 1553 Bus Interrupt Start of Frame Interrupt 1.

Slide 16: 

Previous minor cycle’s Scheduler Int. rxed on time? Previous minor cycle’s Counter Ints. rxed on time? Channel mode BC? Previous minor cycle’s EOFs rxed on time? Log an error No Yes Yes Yes Yes No No channel < Number of 1553 Channels? Yes No No

Slide 17: 

Has interrupt started on time? Interrupt processing Yes Log interrupt event and increment count Log an error Start Cpuload Measurement Monitor Start of Interrupt ISR Monitor End of Interrupt ISR No Has interrupt ended within time? No End Cpuload Measurement

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MPB Requests a New Minor Cycle Number of 4 Previous Minor Cycle Nr is 0 Current Minor Cycle Nr is 1 Next Minor Cycle Nr is 2 Previous Minor Cycle Nr is 15 Current Minor Cycle Nr is 0 Next Minor Cycle Nr is 1 COM Processing MPB Synchronization Clock Interrupt MPB Command to COM DPR Interrupt An explanation pointer Cyclic Frame and Minor Cycle Management is scheduled in the Sync Interrupt from the MPB to update the previous, current and next minor cycle number and major frame of both channels. Previous Minor Cycle Nr is 1 Current Minor Cycle Nr is 4 Next Minor Cycle Nr is 5 MPB Synchronization Clock Interrupt COM Command to MPB Next Frame and Minor Cycle Management is scheduled in the Counter 1 ISR on a MPB request to update the next major frame and minor cycle number of both channels. Counter 1 ISR Previous Minor Cycle Nr is 0 Current Minor Cycle Nr is 1 Next Minor Cycle Nr is 4

Slide 19: 

Yes Yes No Read General Request Message Log an error In OPERATIONAL state? No Read Start Scheduler Response Command in COM DPR Log an error DPR Read Status OK? No Read Tx Bus Data Message out of COM DPR into Tx Transfer Buffer DPR Read Status OK? Log an error DPR Read Status OK? Log an error No Yes Yes

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Channel Mode? No First or Second MPB Sync? Yes In OPERATIONAL state? No Write Rx Transfer Buffer into COM Dual Port RAM Send Bus Status Msg with associated Start Scheduler Command to MPB Log an error channel < Number of 1553 Channels? Yes BC No BC Counter 0 processing RT Counter 0 processing RT Update non-critical error message in DPR Yes IDLE

Slide 21: 

Channel mode? No First or Second MPB Sync? Yes In OPERATIONAL state? No Yes Process MPB Requests Update local data buffer with transmit data read from the Tx Transfer Buffer BC/RT Yes channel < Number of 1553 Channels? No Update messages in COM DPR Was DPR interrupt from MPB rxed on time? Log an error Update local data buffer with BIM data for next synchronous frame Update 1553 Bus Interfaces with data to transmit in next minor cycle IDLE Yes

Slide 22: 

Yes Yes No First or second MPB Sync? In OPERATIONAL state? No Log an error Start Scheduler Cyclic Number Mgt Monitor previous cycle events Reset monitoring Update Rx Transfer Buffer with previous minor cycle’s non-critical data Log start of monitoring cycle

Slide 23: 

Call Scheduler Monitor Function Scheduler Library Core Scheduler 50 Hz Tasks 6.25 Hz Tasks 3.125 Hz Tasks No Yes In OPERATIONAL state? Log an error Signal EOI and enable PPC interrupts 0.5 Hz Tasks

Slide 24: 

Read critical data of short and double format from the 1553 bus interface into the local data buffer

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Update local data buffer from the 1553 bus interface Yes No Asynchronous frames pending? Run asynchronous frame Time available to run frame in current cycle? Yes No

Slide 26: 

Send Start of Frame command to MPB

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Channel 1553 Driver mode? EOF or Message Interrupt type? BC End of Critical Transfers Processing BC EOF Processing Mode Code EOF or SOF Interrupt? Log an error RT BC EOF MSG Else RT SOF Processing RT EOF Processing Log an error Else EOF SOF

Slide 28: 

Valid COM mode? Which COM mode? EOF Interrupt type? MC Data Bus BC EOF Processing MC Data Bus RT EOF Processing MC Data Bus RT SOF Processing Message or Mode Code Interrupt type? Log an error Log an error No RT Else Yes BC EOF MSG MC IDLE No

Slide 29: 

Read data of double and short format from 1553 bus interface into local data buffer Minor cycle nr read == Current minor cycle nr? Invalidate messages read No Yes

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Read non-critical data of short and double format from the avionics bus interface into the local data buffer End of MC Data Bus Synchronous Frame? Housekeeping Transfers? Run asynchronous frame Process Asynchronous Frame Yes No No Yes MPB Asynchronous Transfer Requests? Yes No

Slide 31: 

Read data of double and short format from MC Data bus interface into local data buffer

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Yes No Was End of Asynchrounous Frame received? Was End of Synchronous Frame received? Log an error No Run next synchronous frame on hardware trigger RT Reset sub-address pointers for next minor cycle BC No OPERATIONAL state? Yes Yes No Swap active and inactive areas First or Second MPB Sync? channel < Number of 1553 Channels? Yes No IDLE Channel Mode? Yes

Slide 33: 

DPR Write Status OK? Write SDM Response Data Message Update General Status Message DPR Write Status OK? Log an error Log an error No No Yes Yes

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IDLE Process Inflight Initialisation request Process Scheduler Synchronistion request channel < Number of 1553 Channels? Update channel terminal Process minor cycle number request Process major frame request Channel 1553 Driver Mode? Process BC Requests Process RT Requests Process IDLE Requests RT BC Yes No

Slide 35: 

No Yes Channel requested to be IDLE? Close 1553 bus interface Yes Channel Startup Tests requested? Initiate Startup-tests No Async transfer requested? Initiate Async Transfer Initialise counter values

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Yes Close 1553 bus interfaces No Initialise counter values Channel requested to be IDLE?

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IDLE BC Channel requested mode? Open 1553 interface as Bus Controller Open 1553 interface as Remote Terminal RT

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Yes No Was Crit Transfer of current minor cycle rxed? Log an error Clear updated flags for channel’s critical messages in the next minor frame Clear updated flags for channel’s non-critical messages in the current minor frame Update Rx Transfer Buffer from local data buffer with the critical data rxed in the current minor cycle

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Clear updated flags for critical messages in the next minor frame Clear updated flags for non-critical messages in the current minor frame Update Rx Transfer Buffer from local data buffer with the critical data rxed in the current minor cycle Read critical data from the bus interface into the local data buffer Update next minor cycle number Synchronisation channel? Minor cycle nr read == Current minor cycle nr? Invalidate messages read Yes No Yes

Slide 40: 

Yes Were previous monitoring cycle’s Counter Ints. been rxed on time? No Yes Was previous monitoring cycle’s Scheduler Int. been rxed on time? No Log critical error Call Cyclic Frame and Minor Cycle Management Reset all event flags and interrupt states Log critical error Generate Software Interrupt 3 Call Cyclic Mode Management

Slide 41: 

7. Channel 1 Interrupt Processing COM DPR to MPB Channel 1 Channel 2 Interrupt Processing Channel 2 MPB Sync Interrupt Processing on the COM COM DPR from MPB MPB Bus Data Processing 3. 2. 4. 9. 10. 11. 14. 15. 16. 17. 3 ms 12 ms 8. 13. 12. MPB Sync to COM 18 ms 21. 20. 1. 5. 6. 18. 19. 3 ms 12 ms 18 ms 3 ms 12 ms 18 ms

Slide 42: 

Re-programme Counter 0 to interrupt in [TBD1] msec and enable it Re-programme Counter 1 to interrupt in [TBD2] msec and enable it Re-programme Counter 2 to interrupt in [TBD3] msec and enable it Update Rx Transfer Buffer with all data rxed in previous minor cycle Re-programme MPB Sync to interrupt in 20 msec.

Slide 43: 

No No No Yes Was previous monitoring cycle’s Scheduler Int. been rxed on time? Yes Were previous monitoring cycle’s Counter Ints. been rxed on time? No Log critical error Yes Yes Was AV Bus EOFs of previous monitoring cycle rxed on time? Was MC Data Bus EOFs of previous monitoring cycle rxed on time? Reset monitoring cycle

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Counter 0 Avionics Bus Interrupt Processing COM DPR to MPB Avionics Bus MC Data Bus Interrupt Processing MC Data Bus Counter 1 COM Scheduler COM DPR from MPB MPB Bus Data Processing MPB Sync to COM Counter 2 18 ms 14 ms 4 ms

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Counter 0 Avionics Bus Interrupt Processing COM DPR to MPB Avionics Bus MC Data Bus Interrupt Processing MC Data Bus Counter 1 MPB Sync Interrupt Processing on the COM COM DPR from MPB MPB Bus Data Processing 4 ms 10 ms MPB Sync to COM Counter 2 18 ms