Architecture 8085 Microprocessor

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Architecture of 8085 µp:

Architecture of 80 85 µ p Presented by Pritam Sagar Sahoo Branch Electronics & Telecommunication Engineering Sec A Guided by S. Mahakul (ETE Department)

Contents:

Contents Introduction Microprocessors 8085 Microprocessor The Salient features of 8085 µP Architecture of 8085 µP Internal Architecture Block diagram of 8085 µP Interrupts Registers PC & STACK System Bus Timing and control unit & Instruction Register & Decoder Conclusion

Introduction:

Introduction As we must know about the CPU the central processing unit. The heart of the computers, this is the component that actually executes instructions. Computers can be generally classified in different categories by size and their power. Microcomputers Working station Minicomputer Mainframe Supercomputer In day to day life we are using LAPTOP or DESKTOP computers. Basically we called them PC or personal computers. These personal computers are coming under Microcomputers category. The term microcomputer is generally synonymous with personal computer, or a computer that depends on a microprocessor.

Microprocessors:

Microprocessors A silicon chip that contains a CPU . In the world of personal computers, the terms microprocessor and CPU are used interchangeably. A microprocessor (sometimes abbreviated μ P ) is a digital electronic component with miniaturized transistors on a single semiconductor integrated circuit (IC). At the heart of all personal computers and most working stations sits a microprocessor. Microprocessors also control the logic of almost all digital devices, from clock radios to fuel-injection systems for automobiles. contents

Microprocessors:

Microprocessors Three basic characteristics differentiate microprocessors: Instruction set: The set of instructions that the microprocessor can execute. Bandwidth: The number of bits processed in a single instruction. Clock speed: Given in megahertz (MHz), the clock speed determines how many instructions per second the processor can execute. In both cases, the higher the value, the more powerful the CPU. For example, a 32 bit microprocessor that runs at 50MHz is more powerful than a 16-bit microprocessor that runs at 25MHz. contents

8085 Microprocessor:

80 85 Microprocessor The salient features of 8085 μP are: It is a 8 bit microprocessor, introduce by Intel in 1976. It is manufactured with N-MOS technology. It has 16-bit address bus and hence can address up to 261=65535 bytes (64KB) memory location through A0-A15. The first 8 lines address bus and 8lines data bus are multiplexed AD0-AD7. The data bus is a group of 8 lines D0-D7. It supports external interrupt requests. A 16-bit program counter (PC). A 16-bit stack pointer (SP). contents

8085 Microprocessor:

80 85 Microprocessor The salient features of 8085 μP are: Six 8-bit general purpose registers arranged in pairs : BC, DE, HL. It requires a signal +5V power supply and operates at 3.2 MHz single phase clock. It enclosed with 40 pins DIP (Dual Inline Package) IC. contents

8085 ARCHITECTURE:

80 85 ARCHITECTURE contents

PowerPoint Presentation:

BLOCK DIAGRAM OF 8085 MICROPROCESSOR contents

8085 architecture:

80 85 architecture ALU (Arithmetic Logic Unit) : The ALU performs the actual numerical and logic operation such as ‘add’, ‘subtract’, ‘AND’, ‘OR’, etc. It uses data from memory and Accumulator to perform arithmetic operation. It always stores result of operation in Accumulator . Memory: The total addressable memory is 64KB. Program memory: Program can be located anywhere in the memory. Jump, branch, call instruction are can be used to jump/branch anywhere within the 64KB. Data Memory: The processor always uses 16-bit address so that they can be placed any where. Stack memory: It is limited by the size of the memory. Stack always grows downward. contents

8085 architecture:

80 85 architecture Interrupt: The processor has 5 interrupts. They are presented below in the order of their priority (from lowest to highest): INTR is a maskable interrupt. When the interrupt occurs the processor fetches from the bus one instruction. RST5.5 is a maskable interrupt. When this interrupts is received the processor saves the content of the PC register in to stack and branches to 2CH(hexadecimal) address. RST6.5 is maskable interrupt. When this interrupt is received the processor saves the contents of the PC register into stack and branches to 34H(hexadecimal) address. RST7.5 is a maskable interrupt. When this interrupt is received the processor save the contents of the PC register into stack and branches to 3CH(hexadecimal) address. TRAP is a non-maskable interrupt. When this interrupt received the processor saves the contents of the PC register into stack and branched to 24H(hexadecimal) address. All maskable interrupt can be enable or disable by the user manually. contents

8085 architecture:

80 85 architecture Registers: The 8085/8080A-programming model includes General purpose registers, one accumulator, and one flag register, as shown in Figure. In addition, it has two 16-bit registers: the stack pointer and the program counter. They are described briefly as follows: Accumulator: It is an 8-bit register that is a part of arithmetic logic unit (ALU). This register is used to store 8-bit data and to perform arithmetic and logical operations. The result of an operation is stored in the accumulator. The accumulator is also identified as register “A” Flag: The ALU includes five flip-flops, which are set or reset after an operation according to data conditions of the result in the accumulator and other registers. They are: Sign: set 1 if the most significant bit of the result is set. Zero: Set 1 if the result is zero. Auxiliary Carry: Set 1 if there was a carry out from the 3 bit to 4 bit of the result. Parity: Set 1 if the Parity(the number of set bits in the result) is even. Carry: Set 1 if there was a carry during addition, or borrow during subtraction/Comparison/ rotation. contents

8085 architecture:

80 85 architecture General Registers: The 8085 µP six general purpose registers to store 8-bit data. These are identified as B, C, D, E, H and Las shown in the figure. 8-bit B and 8-bit C registers can be used as one 16-bit BC register pair. When used as a pair the C register contains low-order byte. Some instructions may use BC register as a data pointer. 8-bit D and 8-bit E registers can be used as one 16-bit DE register pair. When used as a pair the E register contains low-order byte. Some instructions may use DE register as a data pointer. 8-bit H and 8-bit L registers can be used as one 16-bit HL register pair. When used as a pair the L register contains low-order byte. HL register usually contains a data pointer used to reference memory addresses. contents

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8085 architecture:

80 85 architecture Program Counter: This 16-bit register deals with sequencing the execution of instructions. This register is a memory pointer. Memory locations have 16-bit addresses, and that is why this is a 16-bit register. The microprocessor uses this register to sequence the execution of the instructions. The function of the program counter is to point to the memory address from which the next byte is to be fetched. Stack Pointer: The stack pointer is also a 16-bit register used as a memory pointer. It points to a memory location in R/W memory, called the stack. The beginning of the stack is defined by loading 16-bit address in the stack pointer. The stack concept is explained in the chapter "Stack and Subroutines.“ contents

8085 architecture:

80 85 architecture System Bus: Typical system uses a number of busses, collection of wires, which transmit binary numbers, one bit per wire. A typical microprocessor communicates with memory and other devices (input and output) using three busses: Address Bus, Data Bus and Control Bus . Address Bus: One wire for each bit, therefore 16 bits = 16 wires. Binary number carried alerts memory to ‘open’ the designated box. Data Bus: carries ‘data’, in binary form, between μP and other external units, such as memory. Typical size is 8 or 16 bits. Size determined by size of boxes in memory and μP size helps determine performance of μP. Control Bus: Control Bus are various lines which have specific functions for coordinating and controlling μP operations. contents

8085 architecture:

80 85 architecture Timing & Control Unit: The timing and control unit synchronizes all the microprocessor operations with the clock and generates the control signals necessary for communication between the microprocessor and peripherals. Instruction Register & Decoder: When an instruction is fetched from memory it is placed in instruction register. Then it is decoded and encoded into various machine cycles. contents

Conclusion:

Conclusion so for now a days electronic devices are broadly depend upon microprocessors. so the computational or processing speed is become high. automation of industrial processes and office administration. since the device is programmable, there is flexibility to alter the system by changing the software alone. less numbers of components, compact in size and cost is also less. as every electronic devices have some merit as well as demerits it has limitations on the size of data. most of the microprocessors does not support floating point operations. contents

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N E Queries :

N E Queries ??? contents

Reference :

Reference Wikipedia.com www.imtonline.org/iitm/downloads/notes/Unit4.pdf http://www.scribd.com/doc/20838382/Microprocessor-8085-notes http://www.elec-intro.com/microprocessor-8085 http://www.cpu-world.com/Arch/8085.html

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