Transistor Biasing


Presentation Description

Above presentation have brief detail about transistor biasing and methods of biasing with proper illustrations. so lets comment and download.


Presentation Transcript


KUVEMPU UNIVERSITY DEPARTMENT OF ELECTRONICS Jnana Sahyadri,Shankaraghatta Seminar on: BY B.S.PATIL 1 ST YEAR M.SC Dept. of Electronics Kuvempu University Biasing of BJT

PowerPoint Presentation: 

INTRODUCTION: Transistor biasing is required for faithful amplification and to make quiescent point . The proper flow of zero signal collector current and maintenance of proper collector-emitter voltage during the passage of signal is known as transistor biasing

PowerPoint Presentation: 

The biasing network associated with transistor should meet the following requirements. It should ensure proper zero signal collector current. It should ensure that V CE does not fall below 0.5 for Ge transistor and 1V for silicon transistor at any instant. It should ensure the stabilization of operating point. The process of making the strength of a weak signal without any change its general shape is known as faithful amplification The process of making operating point independent of temperature changes or variations in transistor parameters is known as stabilisation

PowerPoint Presentation: 

Need for stabilisation: Stabilisation of the operating point is necessary due to following reasons: Temperature dependence of I c. Individual variations Thermal runway The self-destruction of an unstabilised transistor is know as thermal runway The rate of change of collector current I C w.r.t. the collector leakage current *I CO at constant β and I B is called stability factor Stability factor, S = dI C dI CO

The Thermal Stability of Operating Point SIco: 

The Thermal Stability of Operating Point S Ico The Thermal Stability Factor : S ico This equation signifies that I c Changes S Ico times as fast as I co The general expression of stability factor for a C.E. Configuration can be obtained as under. Differentiating the equation of Collector Current I C & rearranging the terms we can write It may be noted that Lower is the value of S Ico better is the stability I B , β The rate of change of collector current Ic w.r.t. the collector leakage current Ico at constant β and I B is called stability factor

PowerPoint Presentation: 

BJT BIASING CIRCUITS Fixed Base Bias Circuit (Base Resistor Method) Collector to Base Bias Circuit (Biasing with Feedback Resistor) Voltage-Divider Bias Circuit (Potential-Divider Bias Method)

The Fixed Bias Circuit: 

The Fixed Bias Circuit The Thermal Stability Factor : S ico General Equation of S Ico Comes out to be I b R b R C I C I B =I C / β R B = V CC / I B I B , β Circuit analysis: It is required to find the value of Rb so that required collector current flows in the zero signal conditions. Let Ic be the required zero signal collector current.

PowerPoint Presentation: 

Applying KVL through Base Circuit we can write, Diff.. 1 w. r. t. I C , we get Therefore the stability factor becomes is very large Indicating high un-stability I b R b R C I C I B =I C / β R B = V CC / I B 1

PowerPoint Presentation: 

Advantages : This biasing circuit is very simple as only one resistance R B is required . Biasing conditions can easily be set and calculations are simple. There is no loading of the source by the biasing ckt. Since no resistor is employed across base emitter junction. Disadvantages: This method provides poor stability. It is because there is no means to stop a self-increase in collector current due to temperature rise and individual variation.For example, if β increases due to transistor replacement, then Ic also increased by the same factor as I B is constant. The stability factor is very high. Therefore, there are strong chances of thermal runway. Due to these disadvantages, this method of biasing is rarely employed.

PowerPoint Presentation: 

Example1: Figure shows that a silicon transistor with = 100 is biased by base resistor method. Draw the d.c . load line and determine the operating point. What is stability factor? I b R b R C I C I B =I C / β R B = V CC / I B 530k 2k 6v 6v Solution: D.C. load line: From figure When Ic=0, Vce = Vcc =6v. This locates the first point B of the load line on collector emitter voltage axis as shown in figure. When Vce = 0, Ic = Vcc/Rc =6v/2k =3mA. This locates the second point A of the load line on the collector current axis . By joining A and B, d.c. load line AB is constructed.

PowerPoint Presentation: 

Operating point Q : As it is a silicon transistor, therefore Vbe = 0.7V. According to base bias circuit, it is clear that : Stability factor: Example: Design base resistor bias circuit for CE amplifier such that operating point is Vce = 8V and Ic = 2mA. You are supplied with a fixed 15V d.c. supply and a silicon transistor with Beta=100. take base-emitter voltage Vbe= 0.6. Calculate Rc and Rb. 0 3mA 6v Q 1mA 4v A B Ic Vce

The Collector to Base Bias Circuit: 

The Collector to Base Bias Circuit The General Equation for Thermal Stability Factor, S Ico = ∂ I c ∂ I co Comes out to be S Ico ═ 1 + β 1- β ( ∂ I b / ∂ I C ) Applying KVL through base circuit we can write (I b + I C ) R C + I b R b + V be = V cc Diff. w. r. t. I C we get ( ∂ I b / ∂I c ) = - R C / (R b + R C ) Therefore, S Ico ═ (1+ β ) 1+ [ β (R C / (R C + R b )) ] Which is less than (1+ β ), signifying better thermal stability I c I b V BE + - I E I B , β Rf=Rb

PowerPoint Presentation: 

Advantages: It is a simple method as it requires only resistance R B . This circuit provides some stabilisation of the operating point. Disadvantages: This ckt. does not provide good stabilisation because stability factor is fairly high, through it is lesser than that of fixed biased. Therefore, the operating point does change, although to extent, due to temperature and other effects. This ckt. Provides a negative feedback which reduces the gain of the amplifier. During the positive half-cycle of the signal, the collector current increases. The increased collector current would result in grater voltage drop across Rc. This will reduce the base current and hence collector current.

PowerPoint Presentation: 

Example1: Figure shows a silicon transistor biased by feedback resistor method. Determine the operating point. Given that beta is 100 I c I b V BE + - I E 1k 100k 20V

The Potential Divider Bias Circuit: 

The Potential Divider Bias Circuit The General Equation for Thermal Stability Factor, S Ico ═ 1 + β 1- β ( ∂ I b / ∂ I C ) Applying KVL through input base circuit we can write I b R Th + I E R E + V be = V Th Therefore, I b R Th + (I C + I b ) R E + V BE = V Th Diff. w. r. t. I C & rearranging we get ( ∂ I b / ∂I c ) = - R E / (R Th + R E ) Therefore, This shows that S I co is inversely proportional to R E and It is less than (1+ β ), signifying better thermal stability. Thevenin Equivalent Ckt I C I b I C I b I C Thevenins Equivalent Voltage Self-bias Resistor R th = R 1 *R 2 & Vth = Vcc R 2 R 1 +R 2 R 1 +R 2

PowerPoint Presentation: 

Advantages: The stability factor S is small. The circuit gives the maximum possible of thermal stability. Due to design considerations, R T /R E has a value that cannot be neglected as compared to 1. In actual practice, the circuit may have stability factor around 10.

PowerPoint Presentation: 

Voltage Divider Biasing Circuit in bred board

PowerPoint Presentation: 

Design of Transistor Biasing Circuits: Step1 : It is a common practice to take Re=500-1000ohm Greater the value of Re, better is the stablisation However, if Re is very large, higher voltage drop across it leaves reduced voltage drop across the collector load. Consequently, the output is decreased. Therefore, a compromise has to made in selection of the value Re. Step2: The zero signal collector current Ic is chosen according to the signal swing. However, in the initial stages of most transistor amplifiers, zero signal Ic=1mA is sufficient. The major advantages of selecting this value are: 1] The output impedance of a transistor is very high at 1mA. This increases the voltage gain. 2] There is little danger of overheating as 1mA is quite a small collector current. It may be noted here that working the transistor below zero signal Ic=1mA is not advisable because of strongly non-liner transistor characteristics.

PowerPoint Presentation: 

15V 10k 5k 1k 2k Example1: Figure shows the voltage divider bias method. Draw the d.c. load line and determine the operating point. Assume the transistor to be of silicon. 0 5mA 15v Q 2.15mA 8.55v A B Ic Vce

PowerPoint Presentation: 

Step3 : The values of resistances R1 and R2 are so selected that current I flowing through R1 and R2 is at least 10 times Ib i.e. I =10Ib. When this condition is satisfied, good stabilisation is achieved. Step3: The zero signal Ic should be a little more (say 20%) than the maximum collector current swing due to signal. 9V 2.2k In the circuit, the operating point is chosen such that Ic=2mA, Vce=3V. If Rc=2.2k ohm ,Vcc=9V and Beta is 50,determine the values of R1, R2 and Re. take Vbe = 0.3V and I = 10 Ib

Explain the purpose of the input and output capacitors.   : 

Explain the purpose of the input and output capacitors. The purpose is to block any DC voltage from an input transducer such as a microphone which could alter the DC biasing conditions for the amplifier to operate correctly. Similar for output.

Transistor Testing: 

Transistor Testing 1 . Curve Tracer Provides a graph of the characteristic curves. 2. DMM Some DMM’s will measure  DC or HFE. 3. Ohmmeter

PowerPoint Presentation: 

The b (beta) or current gain of a transistor can be measured using a digital multimeter. The BC108 transistor used in our amplifier is npn.

Hoping you enjoy the transistor topic!: 

Hoping you enjoy the transistor topic! THE END