logging in or signing up Emerging Nanotechnology Devices ankush85 Download Post to : URL : Related Presentations : Share Add to Flag Embed Email Send to Blogs and Networks Add to Channel Uploaded from authorPOINT lite Insert YouTube videos in PowerPont slides with aS Desktop Copy embed code: Embed: Flash iPad Copy Does not support media & animations WordPress Embed Customize Embed URL: Copy Thumbnail: Copy The presentation is successfully added In Your Favorites. Views: 4151 Category: Science & Tech.. License: All Rights Reserved Like it (9) Dislike it (0) Added: November 20, 2009 This Presentation is Public Favorites: 6 Presentation Description Online Photography course by Ankush Bagga, join: http://www.wiziq.com/course/5247-photography-tips-for-beginners Comments Posting comment... By: yogeshbatra (25 month(s) ago) plz send this to firstname.lastname@example.org Saving..... Post Reply Close Saving..... Edit Comment Close By: harshali_1590 (27 month(s) ago) plz send this ppt to email@example.com Saving..... Post Reply Close Saving..... Edit Comment Close By: abhaykaur (27 month(s) ago) nanotechnology Saving..... Post Reply Close Saving..... Edit Comment Close By: sumitbasa (27 month(s) ago) can u plz allow me to download this video? Saving..... Post Reply Close Saving..... Edit Comment Close By: loginanand (27 month(s) ago) could u plz send this ppt to firstname.lastname@example.org Saving..... Post Reply Close Saving..... Edit Comment Close loading.... See all Premium member Presentation Transcript A Tutorial onEmerging Nanotechnology Devices : 1 A Tutorial onEmerging Nanotechnology Devices Ankush Bagga Outline : 2 Outline Introduction Nano Scale MOSFET Carbon Nanotube FETs Solid State Quantum Devices Molecular Electronics Challenges and the Current State of the Art Conclusion Introduction : 3 Introduction Feature size nearing the physical limits Fabrication process approaching limits Power consumption – a concern Quantum effects need to be accounted for Solution? Nanotechnology We present an overview of new devices and outline some open problems. : 4 : 5 What is Nanotechnology? : 6 7 Jan 2004 17th Int'l Conference on VLSI Design What is Nanotechnology? Switching devices of nanometer (below 100nm, typically 10nm) dimensions define nanotechnology. Logic (Our Focus) Memory Fabrication Nano CMOS Emerging Nanotechnology Drivers Emerging Nanotechnology Solutions Computing Devices : 7 Computing Devices CMOS Devices Solid State Devices Molecular Devices Nano CMOS Quantum Dot RTD Quantum Devices CNFET SET Electro- mechanical Photoactive Quantum Electro- chemical Nano-Scale MOSFET : 8 Nano-Scale MOSFET Metal Oxide Semiconductor Field Effect Transistor Three terminal device Source, gate and drain Vg controls the conduction from source to drain Half thickness of the gate is called “Feature size λ” Current feature sizes in production – 90nm (Intel Pentium 5) Demonstrated feature sizes up to 20nm (IBM). Photo Courtesy: Fujitsu Labs Challenges : 9 Challenges Difficulties High electric fields Power supply vs. threshold voltage Heat dissipation Interconnect delays Vanishing bulk properties Shrinkage of gate oxide layer Too many problems to continue miniaturization as physical limits approach Proposed solutions are short term Open Problems Improve lithographic precision (eBeam) Explore new materials (GaAs, SiGe, etc.) As a long term goal explore new devices Outline : 10 Outline Introduction Nano scale MOSFET Carbon Nanotube FETs Solid State Quantum Devices Molecular Electronics Challenges and current state of the art Conclusions Carbon Nanotubes : 11 Carbon Nanotubes Carbon nanotubes are long meshed wires of carbon Longest tubes up to 1mm long and few nanometers thick made by IBM. Electrical Properties of CNT : 12 Electrical Properties of CNT Carbon nanotubes can be metallic or semiconductor depending on their chirality. Chiral Vector C is defined as the vector from one open end of the tube to the other after it is rolled. If (n-m) is divisible by 3, the tube is metallic If (n-m) is not divisible by 3, the tube is semiconducting. C = n a1 + m a2 Carbon Nanotube FET : 13 Carbon Nanotube FET CNT can be used as the conducting channel of a MOSFET. These new devices are very similar to the CMOS FETs. All CNFETs are pFETs by nature. nFETs can be made through Annealing Doping Very low current and power consumption Although tubes are 3nm thick CNFETs are still the size of the contacts, about 20nm. Courtesy: IBM CNT Fabrication : 14 CNT Fabrication Controlling the conductivity of the tubes (Constructive Destruction) All tubes laid on the contact Metallic tubes are destroyed Controlling diameter of the tube Start with MWNTs. Destroy the outer layers one by one to reduce diameter. Placing exactly at the required location. Yet to be demonstrated convincingly to exploit complete advantage using Lithography. Using DNA for self assembly Demonstrated by Techion-Israel very recently (Nov’2003). Courtesy: IBM Courtesy: IBM Summary and Challenges : 15 Summary and Challenges CNTs are flexible tubes that can be made conducting or semiconducting. Nano-scale, strong and flexible. Challenges: Multilevel interconnects not available Chip density still limited to the density of contacts. Tube density not entirely exploited Fabrication is still a stochastic process Alternatives to gold contacts need to be found. Open Problems and Initiatives: Fabrication using DNA for self assembly (Technion-Israel; Science, Nov 2003) Memory array of nanotubes using junctions as bit storages (Lieber at Harvard) Using nanotube arrays to make computing elements (DeHon at Caltech) Fabricate FPGAs using CNFETs and STM (Avouris at IBM) Outline : 16 Outline Introduction Nano scale MOSFET Carbon Nanotube FETs Solid State Quantum Devices Molecular Electronics Challenges and current state of the art Conclusions Solid State Quantum Devices : 17 Solid State Quantum Devices Quantum effects used to build devices. Electrons confined on an island Island can be created by using different band-gap devices in succession Island has certain allowed energy levels If allowed energy levels are filled then the device is in conduction Types of devices Resonant Tunneling Diode (RTD) Single Electron Transistor (SET) Quantum Dot (QD) Blocking conduction due to unavailable energy levels is called coulomb blockade Energy Occupied Energy Levels Occupied Energy Levels Allowed Energy Levels Source Island Drain Barrier Distance Barrier Principle of Conduction : 18 Principle of Conduction Conduction can occur by Increasing source to drain voltage Applying Gate Bias Allowed Energy Levels Source Island Drain Energy Occupied Conduction Band Allowed Energy Levels Source Island Drain Energy Occupied Conduction Band Gate bias Occupied Conduction Band Conduction Conduction Single Electron Transistors (SET) : 19 Single Electron Transistors (SET) Conductance changes in spurts as energy levels are discrete To go from conducting to non-conducting stage, it requires voltage sufficient for one electron to cross This is achieved by applying gate bias enough for just one electron charge -- hence the name SET Bias required for conduction is coulomb gap voltage Same device can act as pFET or nFET based on the barrier strength Applications: Extra sensitive charge meters CMOS style conducting devices Drain Source Gate Cg Island Quantum Dots and Arrays : 20 Quantum Dots and Arrays 3-dimensional island tunneling barrier State determined by presence of electron and not by conduction. Quantum cell array (QCA) is a lattice of these cells with 2 electrons confined. Occupied electrons are furthest from each other due to repulsive forces. Courtesy: vortex.tn.tudelft.nl/ grkouwen/kouwen.html Inter-dot Barriers Outer Barriers Dot occupied by Electron Dot unoccupied Quantum Cellular Automata : 21 Quantum Cellular Automata 2 states – “1” and “0”. Electrostatic interaction of nearby cells makes the bits flip. Input to the cell is by manipulating the Inter-dot barriers. Logic gates can be constructed. “1” “0” 1 1 QCA Wire 1 0 QCA Inverter Stable Unstable Summary and Challenges : 22 Summary and Challenges Summary Electrons confined on an island. Allowed energy levels are discrete and allow the device to fluctuate between conducting and non-conducting states. SET – 2 dimensional device with gate bias control. QD – device with electron presence as state. QCA – Arrays of QDs used for computing. Challenges Background charge may offset states (noise sensitivity) Sensitivity of tunneling current to barrier width (lithographic accuracy) Sensitivity to barrier widths Cryogenic operation Open Problems Lithographic methods with guaranteed accuracy Self assembly of systems Background charge elimination Synthesis and verification techniques needed Testing of these devices as stuck-at models may be inadequate. Outline : 23 Outline Introduction Nano scale MOSFET Carbon Nanotube FETs Solid State Quantum Devices Molecular Electronics Challenges and current state of the art Conclusions Molecular Electronics : 24 Molecular Electronics Incentives Molecules are nano-scale Self assembly is achievable Very low-power operation Highly uniform devices Quantum Effect Devices Building quantum wells using molecules Electromechanical Devices Using mechanical switching of atoms or molecules Electrochemical Devices Chemical interactions to change shape or orientation Photoactive Devices Light frequency changes shape and orientation. Molecular Electronics : 25 Molecular Electronics Mechanical synthesis Molecules aligned using a scanning tunneling microscope (STM) Fabrication done molecule by molecule using STM Chemical synthesis Molecules aligned in place by chemical interactions Self assembly Parallel fabrication Benzene ring Acetylene linkage Thiol An Atomic Relay : 26 An Atomic Relay Summary and Challenges : 27 Summary and Challenges Summary Parallel self assembly Very regular structures Many alternatives proposed but inherent problems Very low energy operation Challenges Signal restoration and gain Finding non-interacting chemicals Chemical reactions stochastic with by-products Slow operating speeds Open Problems Self assembling of devices Increased speed of operation Guaranteed switching of molecules (HP- UCLA devices) Simulation models and CAD Conclusion : 28 Conclusion CMOS technology is approaching saturation – problems in the nanometer range Several new possibilities emerging Carbon nanotubes (CNT) Single-electron transistor (SET) and quantum dots (QD) Molecular computing devices You do not have the permission to view this presentation. In order to view it, please contact the author of the presentation.