Sigma-Delta (DAC) Theory
Motivation: Use of low precision analog circuitry.
Example: 16 bit DAC for 3V reference voltage leads to permissible half (LSB) voltage of 23uV=(2^-17*3).
Sigma Delta obtains resolution via feedback and oversampling to shape quantization noise, introduce by truncation of fine signal.
Problems: Oversampling increases power consumption.
In high order modulators large inputs can lead to instability.

Sigma-Delta (DAC):

Sigma-Delta (DAC) Theoretical Dynamic Range:
L = modulator order (i.e. number of integrators in forward path)
M = oversampling ratio (OSR)
N = Number of bits
Approx.
bit increase for unit increase in L.

Sigma-Delta (DAC):

Sigma-Delta (DAC) Interpolation Filter: (oversampling)
-Changes the data rate to oversampling rate (OSR).
-Suppresses spectral replicas centered at Nyquist multiples.

Sigma-Delta (DAC):

Sigma-Delta (DAC) Noise Shaping Loop:
Function: To suppress most of quantization noise power, introduced by the quantization in the in-band portion of the spectra.

Sigma-Delta (DAC):

Sigma-Delta (DAC) -Stability: “not stable” meaning the modulator exhibits large, but not unbounded states, and poor SNR compared with that predicted by linear models.
-Relation between high order modulator and resolution:
noise transfer function (NTF) is of form:
therefore for large n, NTF exhibits high
SNR even at low oversampling ratios.

Sigma-Delta (DAC):

Sigma-Delta (DAC) -Linear Model:
Modulator is split into: a) linear block (loop filter)
b) nonlinear block (quantizer)
Output consists of independently filtered signal and noise components.

Sigma-Delta (DAC):

Sigma-Delta (DAC) Note: signal transfer function (STF) G(z) with input U(z) is equivalent to modulator with STF = 1 and input = G(z)U(z), therefore for stability analysis we look only at H(z) (NTF), since G(z) merely acts as a prefilter on the input.
Previous equation hides the fact that noise is signal dependent, which leads to modeling errors.
-Modeling Error:
With k>0, being a gain at the input of the quantizer. Since quantizer is binary k does not affect operation of modulator, but affects linear model.

Sigma-Delta (DAC):

Sigma-Delta (DAC)
Thus NTF and STF are different from linear model and may even be unstable.
Question is, what is optimal k value to minimize error signal power:
Therefore prior knowledge of signal statistics of input must be
Known in order to find optimum linear model.

Sigma-Delta (DAC):

Sigma-Delta (DAC) Applying root locus analysis:
Input to the quantizer must not be allowed to become too large.

Sigma-Delta (DAC):

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Sigma-Delta (DAC) (show proposed architectures of NSL)
Design
This design method yields stable designs.
1) Set modulator order and NTF filter family (recommended Butterworth, Chebyshev)
2) Choose filter cutoff frequency and scale transfer function so that the first sample of the impulse response is 1.
3) Construct modulator with this NTF and simulate to determine maximum stable input and peak SNR.
4) If modulator is unstable, reduce out of band gain of the NTF.
This is accomplished by lowering the filter cutoff. This reduces magnitude of first sample of impulse response, when rescaled to 1 the resulting filter passband gain will be reduced in comparison to original filter. As rule of thumb out of band gain of NTF should be around 1.5 dB.

Sigma-Delta (DAC):

Sigma-Delta (DAC) 5) If modulator is stable but SNR is not adequate, increase out of band gain of NTF. By pushing modulator close to edge of instability an aggressive NTF yields SNR values as much as 20 dB higher than produced by first cut design. But this aggressive modulators can easily be driven into instability by large inputs or small parameter shifts. If desired SNR is not compatible with modulator stability a higher order modulator is needed.
Aside note: Multibit quantization has practical shortcoming of requiring extremely accurate digital to analog conversion in the feedback loop.

Sigma-Delta (DAC):

Sigma-Delta (DAC)

Sigma-Delta (DAC):

Sigma-Delta (DAC) References
Schreier R., Norsworthy S., Temes G.; “Delta Sigma Data Converters”
Johns D., Martin K., “Analog Integrated Circuit Design”
Toumazou C., “Circuits and Systems Tutorials”

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