registers

Slide 1: 

COMPUTER SCIENCE & TECHNOLOGY DEGREE PROGRAM FACULTY OF SCIENCE & TECHNOLOGY UVA WELLASSA UNIVERSITY 1 Registers & Counters

Slide 2: 

2 Registers

Introduction: 

Introduction Register is a sequential circuit that could keep a binary data A set of Flip Flops together with gates implements the state transition of registers n-bit register includes n number of Flip Flops and is capable of storing n-bit of binary information

Introduction…: 

Introduction … Mainly there are two types of registers Data/Basic Registers Shift Registers

Data Registers: 

Data Registers 4-bit data register D 0 =1 Clock D C Q D C Q D C Q D C Q Clear Q Q Q Q D 3 =1 D 1 =0 D 2 =0 Q 0 =1 Q 1 =0 Q 2 =0 Q 3 =1

Data Registers…: 

Data Registers… The common clock triggers all flip-flops on the rising edge of each clock pulse and the binary data available at 4 data inputs are transferred into the register. The four Q outputs can be sampled (combined) to obtain the binary information stored in the register. 3. Clear input clears all registers to zero prior to its clocked operation.

Loading a Register: 

Loading a Register Transfer of new information into a register is referred to as loading a register. There are two types of loading: Serial loading - loading bits sequentially ( one bit at a time) 2. Parallel loading – loading all bits simultaneously.

Shift Registers: 

Shift Registers 1. A register capable of shifting its stored bits laterally in one of both directions is called a shift register. 2. Shift register consists of a chain of flip-flops in cascade with the output of one flip- flop connected to the input of the next flip-flop.

Shift Registers…: 

Shift Registers… Shift registers are classified according to the methods that can be used to transfer their input and output data. a. Serial-in, Serial out shift registers Serial-in, Parallel-out shift registers Parallel-in, Serial-out shift registers d. Parallel-in, Parallel-out shift registers

Shift Registers…: 

Shift Registers… Serial-in, Serial-out Shift Registers Rightmost flip flop Leftmost flip flop Serial Input Serial Output Clock D C Q1 D C Q4 D C Q2 D C Q3 Clear

Shift Registers…: 

Shift Registers… When serial data is transferred into a register, each new bit is clocked into the first flip-flop in the register. 2. The bit was previously stored by that flip-flop is transferred to the second flip- flop; the bit that was stored by the second flip-flop is transferred to the third and so on.

Shift Registers…: 

Shift Registers… Example: For serial input 1001 After clock pulse Serial Input Output Q1 Q2 Q3 Q4 Initially 1 0 0 0 0 1 0 1 0 0 0 2 0 0 1 0 0 3 1 0 0 1 0 4 1 0 0 1

Shift Registers…: 

Shift Registers… Shift registers are also classified according to the direction of shift. 1. Left shift registers 2. Right shift registers 3. Bidirectional shift registers

Shift Registers…: 

Shift Registers… Bidirectional Shift Registers Bidirectional Shift Register is a shift register whose bits can be shifted from left to right or from right to left. Universal Shift Registers Universal Shift Register is a bidirectional register whose input can be in either serial or parallel form and whose output can be in either serial or parallel.

Slide 15: 

15 Counters

Introduction: 

Introduction A counter is a special type of register that goes through a predetermined sequence of states upon the application of clock pulses. In a counter flip-flops are interconnected so that their combined state at any time is the binary equivalent of the total number of pulses that have occurred up to that time.

Introduction…: 

Introduction… Counters are available in two categories 1. Synchronous Counters 2. Asynchronous Counters/ Ripple Counters Also counters can be classified as: Binary, Decimal and BCD as well. Binary counters follow the binary number sequence.

Introduction…: 

Introduction… Binary Ripple Counters A binary counter is counter that follows the binary number sequence. An n-bit counter consists of n-flip-flops and could count in binary from 0 through 2 n -1 Up and Down Counters An up counter counts up and its binary content increases as the number of clock pulses increases. A down counter counts down and its binary content decreases as the number of clock pulses increases. .

Asynchronous Counters: 

Asynchronous Counters Design Issues Flips are most often JK type 2. To get state transitions (to increase the state by one) usually counters use the negative edge-triggered JK flip-flops with J=K=1 (toggling state) and use the Qoutput of a flip-flop as the toggling input to the next with clock triggering the first flip-flop

Asynchronous Counters…: 

Asynchronous Counters… Ex: 3-bit Binary Ripple Up Counter J K Q C Q J K Q C Q J K Q C Q Q0 Q1 Q2 Clock Logic 1 Clear

Asynchronous Counters…: 

Asynchronous Counters… Timing Diagram 1 2 6 7 8 9 10 5 4 3 Clock J K Q0 Q1 Q2

Asynchronous Counters…: 

Asynchronous Counters… The Count Table After clock pulse Count Q2 Q1 Q0 Initially 0 0 0 1 0 0 1 2 0 1 0 3 0 1 1 4 1 0 0 5 1 0 1 6 1 1 0 7 1 1 1 8 0 0 0 Reset after 8 pulse 9 0 0 1 10 0 1 0

Modulus of a Counter: 

Modulus of a Counter The number of the of the clock pulse that causes a counter reset to its initial content OR the total number of distinct states that a counter can stores including zero, is called the modulus of the counter. Therefore, 3-bit counter = mod 2 3 =mod-8 counter

Mod-5 Counter: 

Mod-5 Counter Here, the clear inputs are used to reset the counter whenever the counter reaches 101 J K Q C Q J K Q C Q J K Q C Q Q0 Q1 Q2 Clock Logic 1 Clear

Mod-5 Counter…: 

Mod-5 Counter… 1 2 6 7 8 9 10 5 4 3 Clock Q1 J K Q3 Q2 Timing Diagram

Mod-5 Counter…: 

Mod-5 Counter… The Count Table After clock pulse Count Q2 Q1 Q0 Initially 0 0 0 1 0 0 1 2 0 1 0 3 0 1 1 4 1 0 0 5 0 0 0 Reset after 5 pulses 6 0 0 1 7 0 1 0 8 0 1 1 9 1 0 0 10 0 0 0 Reset after 10 pulses

Synchronous Counters: 

Synchronous Counters Design Issues The flip-flops are most often JK type with J=K=1 2. In general the states of all the flip-flops are used to determine the next state of any given flip-flop, through logic circuitry connected to the J & K inputs of that flip flop.

Synchronous Counters…: 

Synchronous Counters… Ex: 3-bit Synchronous Binary Up Counter Q0 Q1 Q2 Clock Logic 1 Clear J K Q C J K Q C Q J K Q C Q J K Q C Q

Slide 29: 

Note: T Flip-Flops In counters, JK flip-flops with J=K=1 could be replaced by T-flip-flops. J K Q C Q Logic 1 T C T Q Q