Recitation7

Upcoming Schedule: 

Upcoming Schedule Today: Review for Midterm Thursday (2/19): 5pm to 7pm HKN review in the 226 Creese Building Monday (2/23): Midterm Exam II Labs due in Recitation (1/26, 1/27) Tuesday (3/2): Homework #6

Midterm Review - Topics: 

Midterm Review - Topics Combinational Design AND, OR, Inverters, XOR Minterms, Maxterms, SOP, POS Circuit representations: AND/OR, OR/AND, all NANDs, all NORs Simplification K-Maps POS, SUM Don’t Cares Combinational Logic Design PLA Decoders Encoders Tri-State Buffers MUX

Midterm Review – What will it cover?: 

Midterm Review – What will it cover? Dr. Sethu’s Lectures Recitation Sections Homework: Homeworks 3-5 Book: Chapter 4: Sections 4.1.6, 4.2, 4.3 (except subsection 4.3.8) Chapter 5: Sections 5.1.2 to 5.1.5, 5.2, 5.3.1, 5.4.1 to 5.4.5, 5.5.1, 5.5.2, 5.6.1, 5.7.1 to 5.7.3

NAND and NOR: 

NAND and NOR NAND (not AND) X Y X · Y (X· Y)’ 0 0 0 1 1 0 1 1 NOR (not OR) X Y X + Y (X + Y)’ 0 0 0 1 1 0 1 1 Recall DeMorgan’s theorem Why do designers want to use NAND and NOR gates?

AND/OR (SOP) Configuration to NAND Configuration: 

AND/OR (SOP) Configuration to NAND Configuration

OR/AND (POS) Configuration to NOR Configuration: 

OR/AND (POS) Configuration to NOR Configuration

Use a MUX to express a function: 

Use a MUX to express a function

Slide9: 

Problem 2. a) A three variable function is true if and only if the number represented by the variables is evenly divisible by 3 (0 is evenly divisible by 3). Show the truth table for this function. b) Draw a simplified circuit representing this function using only NAND gates and inverters. c) Draw a circuit representing this function using only NOR gates and inverters.

Slide10: 

Problem 3. The diagram below shows the conventional symbol for a 74x139 dual 2 by 4 decoder. Show how you can use this IC (with no external gates) to construct the function:

Slide11: 

Problem 4. (15 points) Find all prime implicants of the function shown in the map below, and indicate which ones are essential. Write the simplifies SOP expression.

Slide12: 

Problem 5. The circuit below is constructed from 2 input 1 bit multiplexors (B is the MSB). (a) What should be the values of IA and IB so that OUT = X? (b) What should be the values of R, S1, T, U so that OUT = In_1•In_2+In_1’•In_2’?

Slide13: 

Problem 6. Implement the parity bit generator, shown in the truth table below, using only an 8:1multiplexer. Implement the function using only a 4:1 multiplexer. ABC Parity 000 0 001 1 010 1 011 0 100 1 101 0 110 0 111 1

Slide14: 

Problem 7 (16 points). You are playing a game of dice in which, when you roll a dice you win if the number on the top face of the dice is a prime number (note that 2 is a prime number but 1 is not). You lose otherwise. An optical device automatically detects the number on the top face of the dice and sends it as a 3-bit binary number to a circuit which tells you whether or not you have won (the output of the circuit is “1” if and only if you have won). Design the circuit that is as simple as possible.