logging in or signing up SPS Cycling LHC filling Mercede Download Post to : URL : Related Presentations : Share Add to Flag Embed Email Send to Blogs and Networks Add to Channel Uploaded from authorPOINTLite Insert YouTube videos in PowerPont slides with aS Desktop Copy embed code: Embed: Flash iPad Dynamic Copy Does not support media & animations Automatically changes to Flash or non-Flash embed WordPress Embed Customize Embed URL: Copy Thumbnail: Copy The presentation is successfully added In Your Favorites. Views: 525 Category: Education License: All Rights Reserved Like it (0) Dislike it (0) Added: February 05, 2008 This Presentation is Public Favorites: 0 Presentation Description No description available. Comments Posting comment... Premium member Presentation Transcript SPS cycling for LHC injection: SPS cycling for LHC injection J. Wenninger AB/OP Introduction to the timing system. Timing and settings constraints at the SPS. 2-cycle filling scheme. 1-cycle filling scheme. From discussions with J. Lewis, M. Jonker, L. Jensen, M. Lamont and others…Timing system / 1: Timing system / 1 The machine timing is orchestrated by the CBCM (Central Beam and Cycle Manager) which consists of a group of MTGs (1 / machine). The CBCM is working with ‘Beams’ : A beam (timing system definition) is a a group of cycles in the various machines that have to be executed in sequence to produce a meaningful output, i.e. a ‘real beam’. Not all beams involve all machines, some only involve the booster (ISOLDE) or booster and PS (East Hall, AD, nTof).Timing system / 2: Timing system / 2 Normal / Spare : A spare beam is associated to every (main) beam. Before executing the (main) beam (i.e. cycle sequence) the CBCM verifies that the beam can be produced (no external interlock conditions). If there is no problem we are in the ‘Normal’ situation and the beam is executed. If the beam cannot be executed, then a set of spare beams are tested. If the tests are OK, the ‘Spare’ beam is executed. If the tests fail on the ‘Spare beam’, the ‘Spare beam’ is executed, but with the beam cutoff in the Linac. For the SPS the Spare beam is used for the economy mode !Timing sequences / 1: Timing sequences / 1 The BCD (Beam Coordination Diagram) encapsulates all the beam information. Includes one or more SPS beams (FT, CNGS, LHC) as well as booster / PS beams that are run while the SPS is accelerating, extracting…. A BCD Sequence (Timing Sequence) is a collection of BCDs organized to perform certain tasks. If the SPS is involved, the BCD sequence is always composed of : Lead-in BCD that executes the pulse start (once). Repetitive BCD that executes the SPS beam / super-cycle. For coast-able cycles : repetitive BCD that runs the coast. Lead-out BCD that executes the pulse stop (once). The transition from one BCD to the next can be automatic (sequence change, EDF interlocks…) or manual (pulse stop command for SPS, coast start & end…). Timing sequences / 2: Timing sequences / 2 A number of sequences can be loaded into the CBCM at the same time. Switching from one sequence to the next is fast (if they are ready). For the SPS the timing system will automatically execute a Lead-out / pulse stop and Lead-in / pulse start. Note that EVERYTIME we change timing sequence, the SPS will execute a pulse-stop and a pulse-start (since cycles may start at 14 or 26 GeV). The pulse-stop / -start takes ~ 30 seconds, and is not a significant overhead. Our 2004 experience with this timing system : A significant delay (sometimes it was the dominant delay) during SPS super-cycle changes is due to the lengthy editing of the BCDs, because the CPS crews have to copy lot’s of beams back and forth. OP (CPS & SPS sides) is requesting some changes to the BCD editor to simplify life.Users: Users The timing system associates to each cycle a USER the cycle identifier. The user information is sent out over telegrams every BP (Basic Period = 1.2 s). In addition to the PRESENT user, the telegrams also indicate the NEXT user. For the CPS this concept is reasonable given the short cycle lengths (up to 3 BPs). At the SPS this has drastic consequences since the timing system decides one cycle ahead what cycle to play NEXT !! Since at the SPS no system is using the NEXT information (the old SPS timing system did not have this concept) a way out is to decide that at the SPS the next info becomes available only a few seconds (tbd) before the NEXT cycle starts. In 2006 the user information will also be included in each timing event, because the system is ambiguous at the SPS – clients may not be able to decide if they should use the PRESENT or NEXT user tag of the telegram : Some events arrive before the start of the (magnetic) cycle. For example : the injection kickers use events that arrive 1000 ms before each injection. for the first injection they must take the NEXT user, for the others the PRESENT user ! Within a super-cycle, the SPS cycles are not aligned to the BPs.Destinations: Destinations Each beam is associated to a DESTINATION, an information that is also distributed by the timing system. Possible LHC beam destinations : SPS dump no extraction. LHC ring 1. TI2 TED(s). LHC ring 2. TI8 TED(s). The destination can be set DURING the cycle (but asap of course) : At cycle start it will be ‘SPS dump’ or ‘unknow’. The information on the destination can be used to generate selected timing events, either centrally by the MTG or locally in the CTRs (Timing Receivers). selective generation of extraction events. The SW interlock system can send information (external conditions) to the CBCM to inhibit a given destination. Example : if the TEDs are not IN, TED destinations are not allowed !Cycle timings : booster to SPS: Cycle timings : booster to SPS Timing of booster, PS and SPS cycles for the nominal LHC cycle (BP = 1.2s) The beam for the NEXT cycle is already injected into the booster before the PRESENT beam is extracted from the SPS. If we decide that we do not want the NEXT beam in the LHC or do not decide on time, we have to get rid of it somewhere (D3, SPS dump…) as reliably as possible. The (PS) RF system must know the ring & bucket number ~ ten’s of ms before extraction from the PS.SPS timing events: SPS timing events The first SPS timing event of a cycle arrives 3000 ms before beam is injected (which coincides with start cycle). This event is used by BDI (wire scanners). Other event groups arrive ~ 1000 ms before beam injection (kickers & BDI). In this example, we must have already taken the decision what cycle to play before the beam is even extracted to the LHC (unless we pad the beam out with 2-3 BP where we just wait… - see later).SPS settings for LHC beams / 1: SPS settings for LHC beams / 1 Up to now we always used the SAME super-cycles for all LHC beams (pilot, intermediate, nominal…). But the settings for those beams are not identical. Differences are due to : Injector (PS) : Steering of TT2/TT10 extraction from PS injection oscillations. Momentum at injection RF / extraction from PS RF capture. RF – 3 very critical parameters : Injection phase. Injection bucket. Phase loop sampling. SPS ring : Momentum at injection (see ‘injector’). Tune (corrective trims for high intensity – mostly injection FB). Chromaticity (~ +10 higher for nominal). Reference points in the trim history (SPS ring) & manual changes (RF & TT2/10 steering) are used so far to handle beam changes.SPS settings for LHC beams / 2: SPS settings for LHC beams / 2 For 2006 we are considering (G. Arduini, L Normann & JW) the following changes: A dedicated cycle for each beam: No need to go back and forth in the trim history, which is not compatible with ‘faster’ cycling. More cycles to maintain – but the SPS is very stable (even over years) ! Only the orbit maintenance will be a bit more tricky. Faster ramp reduce cycle lengths: Might increase the ramp rate in the central part of the ramp by a factor 2. If the RF ‘allows’ it ! Maintain a slow ramp start Q and Q’ control and measurement.LHC filling – general issues: LHC filling – general issues Master of the ship : LHC is master whenever beam is send to the LHC. SPS is master for MDs, TL setup (up to the dumps), machine checkout… Must foresee a (simple) mechanism of ‘mastership transfer’ and destination change’. Beam destination & delays : To use the beam of a given cycle, the beam destination must be known in time. The CBCM delay depends on cycling details – see later. PS RF system must be informed (bucket & ring) ~ 10 ms before extraction (re-phasing). If the CBCM is not informed in time – i.e. does not know what to do - it should help us prepare a ‘graceful abort’ of whatever beam that may be in the SPS : Hold back extraction events (extraction permit generation & PC pulsing). Send out automatic SPS dump timing events.LHC filling / 1: LHC filling / 1 Possible LHC filling ‘sequence’ : The LHC injection sequencer requests a beam from the CBCM. Either the sequence of batches/buckets/rings is pre-loaded, and the injection sequencer requests the NEXT shot and the CBCM knows what it has to do… Or the injection sequencer has to send the batch/bucket/ring ring info to the CBCM. In addition the RF must be informed about bucket # and ring. It must be informed some 10’s of milliseconds BEFORE extraction from the PS for re-phasing. The required batches are injected into the SPS, and accelerated to 450 GeV. An interlock on the DC beam intensity in the SPS ring can ensure that the intensity does not exceed the requested intensity range. The interlock is activated just after the start of the ramp, and the beam is dumped in the SPS if limits are exceeded. At 450 GeV the bunch length is shortened to fit into LHC buckets. The tails will probably be scraped in the SPS. The beam will be at 450 GeV between 0.5 to 1 second (EDF $).LHC filling / 2: LHC filling / 2 Quality interlocks will be applied (some time) : Beam structure (number of bunches, bunch population spread…) (BDI/fast BCT). Bucket number (RF). Bunch length (RF) and transverse emittance (BDI) – provided we ever get fast measurements…. Since available time is very short, CRITICAL quality interlocks should be generated in the front-ends and connected to the SPS ring beam dump. A CRITICAL quality interlock condition will lead to a beam dump in the SPS before extraction. If there is no hardware interlock from the transfer lines, the LHC injection and the LHC itself (BIC systems), the beam is extracted to the LHC. Only the extraction (and possibly transfer line) corresponding to the destination ring must be pulsing. A ‘task’ must verify that the beam arrived in the LHC. Tests are time-critical if we do not want to miss the next cycle – maximum acceptable delay ~1 second… In the early days this delay may be much longer : manual checks by the OP crew !!! Depending on the outcome of the test: Request next beam. Retry (beam did not leave the SPS…). Pause ? Abort ? If no decision is made in time for the CBCM, the next beam must be aborted somewhere along the injector chain. The sooner the better, since less intensity/energy = less radiation.SPS settings & cycles: SPS settings & cycles Let us consider two possible options : One SPS cycle that holds SPS ring, TI2 and TI8 settings. Two SPS cycles: One cycle for LHC ring 1 filling with SPS ring, LSS6 extraction & TI2 settings. The LSS4 bumpers are not pulsed, the LSS4 kickers are not charged. TT40 (including septum) & TI8 may or may not be pulsed. Another cycle for LHC ring 2 filling with SPS ring, LSS4 extraction & TI8 settings. The LSS6 bumpers are not pulsed , the LSS6 kickers are not charged. TT60 (including septum) and TI2 may or may not be pulsed. Internally both cycles refer to the same SPS ring settings to avoid problems with duplicate settings. Ensures that when we change one cycle, the other follows immediately ( settings download !).2-cycle-option / 1: 2-cycle-option / 1 Consider the option with 2 cycles, one for filling ring1, one for filling ring 2. We can use the NORMAL/SPARE mechanism to define a beam where: NORMAL corresponds to the ring1-cycle. SPARE corresponds to the ring2-cycle. no delays from pulse stop / start. The CBCM can, based on its external conditions (includes sequencer requests), switch between the 2 beams. We are sure that only one extraction is pulsing. We do not need separate timing events for the 2 extractions. For the timing system, the decision on the destination must obviously be taken before the first SPS timing event is issued, i.e. > 3000 ms before a ring1(2) cycle starts executing.2-cycle-option / 2: 2-cycle-option / 2 To ease our life we can ‘pad’ (lengthen) the end of the cycle with n BPs (n=2 to 3) : Gives us margin to decide after the extraction what comes next. The cycle length increases by (2-3)×1.2/21 10-20%. Note that such a longer cycle has some OP advantages too, because we avoid the effect of eddy currents during the injection plateau (why we used a 28.8 s cycle [+6 BPs !] in 2004). For J. Lewis, those BPs should ideally be part of a SEPARATE cycle. This is due to his logic where the NEXT cycle is already defined when a cycle starts executing. This could be an acceptable option for the first year(s).2-cycle-option / 1: 2-cycle-option / 1 Issues : TO accommodate the ECONOMY cycle, we can build a separate sequence/cycle of the same length where the SPS is ‘off’. Implies a sequence change in order to go to ECONOMY. The same solution must probably be applied in the future for complex cycles involving FT, CNGS and MD beams… more than one ECONOMY mode ! If the decision comes late and we have beam in the SPS must prevent extraction : Automatic beam dump event. SW and/or quality interlocks on extraction. The poor-man’s variant of the 2-cycles option : We define a super-cycle with the cycles for ring 1 and ring 2 one after another. Then the ring order is ‘fixed’ which will introduce delays whenever we change the order (ring1/2) … Very simple scheme. We still have to decide if we want a given beam, and ensure we get rid of it properly if not !1-cycle-option / 1: 1-cycle-option / 1 Consider the option with a single cycle. We use a mechanism similar to ECONOMY to pulse the extractions to ring1 or to ring2: By default the PCs are ‘flat’. Extraction events (PCs, interlocks) are generated according to the beam destination either for LSS4/TI8 or LSS6/TI2. The events can be generated during the FB. By default, i.e. if the CBCM receives no ‘request’, the destination is set to ‘SPS dump’ and NONE of the two extractions is pulsed. Machine-protection-wise this is rather nice ! Any beam that still makes it into the SPS will not be extracted, but dumped at the end of the cycle. Requires different timing events for ring 1 & ring 2 extractions. Decision on the destination can be taken later than in the previous scheme : RF requires the info ~ 10’s ms before injection into the SPS this is the HARD LIMIT. CBCM requires the information during injection FB.Conclusions: Conclusions The options have been discussed with J. Lewis, M. Jonker and M. Lamont. Our tentative conclusions was : Both options would work. We should keep both options open. The 1-cycle option with event generation based on the beam destination is better in terms of efficiency since the delays are more ‘relaxed’. Some timing system ‘features’ (mostly the definition of NEXT user) are not suited for the long SPS cycles: Should push to revisit this concept for the SPS. Next : work out the details and verify that we have not missed a critical item. You do not have the permission to view this presentation. In order to view it, please contact the author of the presentation.