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Premium member Presentation Transcript Slide1: SPANSION PRESENTATION Spansion Introduction ORNAND™ MCP Product Strategy Spansion Flash Roadmap 1.8V MCP Product Strategy 3V MCP Product StrategySlide2: Spansion Awards Spansion has received numerous awards for outstanding customer service, technical innovation, and industry distinction. 2005 – Levono Best Supplier Award 2005 – Cisco Supplier of the Year 2005 – Samsung Supplier of the Year 2005 – EDN Leading Product Award 2005 – EDN China Innovation Award 2005 – IT 168 Excellent Technology Award 2005 – Outstanding Employer in Asia 2005 – Best Employer in Thailand 2004 – Samsung Most Valued Partner 2004 – Lenovo Best Supplier Award 2004 – Stack International Gold Award for Quality, Delivery and Service 2002, 2000 – Nortel Networks Supplier of the Year 2002, 2000 – Samsung Best Supplier 2001-2002 – Bosch Top Supplier Award 2000 – Cisco President's Customer Satisfaction Award 1999-2000 – Bosch Top Memory Supplier 1999 – Cisco Supplier of the Year 1999 – Volkswagen Leading Edge Corporate Supplier of the Year 1997 – EDN Innovator of the Year © 2006 Spansion All Rights Reserved | Copyright | Privacy Policy Slide3: Spansion is dedicated to enabling, storing and protecting digital content in the automotive, consumer electronics, networking and wireless markets. As the largest company exclusively focused on Flash memory solutions, Spansion has one of the most diverse and comprehensive Flash product lines on the market. Spansion is solely focused on the integrated electronics market, in which Flash memory resides in the device. In this market segment, customers value differentiated systems with high quality and performance. Blue chip customers in the integrated segment who use Spansion Flash memory products include the top 10 original equipment manufacturers for automotive electronics, consumer electronics and handsets. By leveraging cutting-edge advancements such as the award-winning MirrorBit™ technology, Spansion has successfully developed cost-effective, smaller and more powerful product offerings designed for reliable code execution and data storage. Offering a NOR architecture for code and ORNAND™ architecture for scalable data storage, Spansion’s customers can maintain a common platform and scale the amount of data storage necessary for various applications. Advanced manufacturing capabilities, four dedicated production Flash memory wafer fabs and a development fab enable us to accelerate the introduction of next-generation technologies. As a result, Spansion has developed highly scalable solutions that provide a smooth migration path to future products and technologies over time to meet customers’ evolving requirements. Our world-class, system-level design support leverages the expertise of a dedicated software development team and design engineers to partner with customers and complementary silicon and software providers to optimize systems that incorporate Flash memory. These offerings come with world-class sales, customer service and technical support. Spansion, publicly traded on NASDAQ [SPSN], was previously a joint venture of AMD and Fujitsu and draws upon a rich history of technological innovation and market leadership that dates back to the early days of the Flash market. Spansion has approximately 8,400 employees around the globe. Spansion Asia WSD Marketing Key Roles: Spansion Asia WSD Team Daniel Koh Spansion Asia WSD Marketing Key Roles Platform Marketing & Ref. Design Coordination for Overseas chipsets only Execution of long term Marketing strategy New Product definition & Eco-system analysis Product Portfolio Marketing Future customer products needs interface CHINA CHINA TAIWAN/ROA ASIA Jasson Xu Segment Marketing Jorken Chen Segment Marketing Mike Narodovich Technical Marketing Jessie Yang Business Marketing Responsible for market share analysis (TAM, SAM, SOM) Execution of migration and cost reduction strategy with Field Identify new business opportunities with Field. Product Portfolio Marketing Business Marketing interface for current & forward quarter pricing quotes Execution of short term Marketing strategy with HQ, Interface with factory for Urgent or Priority shipment Track & report pricing trend Maintain Quote Log Responsible for market share analysis (TAM, SAM, SOM) Execution of migration and cost reduction strategy with Field Identify new business opportunities with Field Product Portfolio Marketing Mediatek Account Manager Slide5: Spansion Introduces Family of Highest Performing NOR Flash Memory Combination of MirrorBit NOR and ORNAND brings more powerful multimedia functionality to handsets Spansion Enters NAND portion of cellular market Launch of MirrorBit™ ORNAND™ Scalable memory sub-systems for mobile phones Spansion Brings Secure MirrorBit Technology to SIM MarketSpansion 2005 Market Share*: Spansion 2005 Market Share* Spansion #1 in NOR Market in Q4 2005* Spansion 27.5% STM 15.3% Intel 27.5% * Source: iSuppli Preliminary 2005 Market Share, February 2006 * Based on end customer sales 0 500 1,000 1,500 2,000 2,500 Intel Spansion STM Samsung Toshiba Sharp SST Renesas Micron Other ($M) Spansion $2 Billion revenues in 2005Slide7: Agenda Spansion Introduction Spansion Flash Roadmap ORNAND™ MCP Product Strategy 1.8V MCP Product Strategy 3V MCP Product StrategySpansion TechnologyMirrorBit™ Momentum: 2000 2001 2002 2003 2004 2005 2006 3V MirrorBit sampling 3V MirrorBit production 1.8V MirrorBit production 1998 1999 MirrorBit Research Start 256 Mb, 80MHz, 1.8V, 110nm 16 Mb – 256 Mb 230nm 64 Mb 230nm 512 Mb 110nm Spansion Technology MirrorBit™ Momentum Announced MirrorBit™ Three years to Density & Performance Leadership Four Years to Develop 512 Mb, 133MHz, 1.8V, 90nm MirrorBit ORNAND™, 1.8V, 90nm MirrorBit™ Technology Focus: MirrorBit™ Technology Focus NOR NAND Cost Logic Integration Write Read Density Reliability Integrated Market Strong Neutral Weak MirrorBit™ MirrorBit™ Technology – Conceptual Diagram: MirrorBit™ Technology – Conceptual Diagram Fundamentally different technology to Floating gate with unique advantages MirrorBit™ cell uses a non-conducting planar storage medium Stores full charge in two physically distinct locations on either side of the cell 40% fewer critical steps and at least 10% fewer total stepsSlide11: 1.8V 3.0V NS Family WS Family MS Family GL Family PL Family Optimized for wireless applications including 3G cellular phones High density data storage Leading price-performance page mode Page Mode with simultaneous read/write 8Mb 16Mb 4Mb 32Mb 64Mb 128Mb 256Mb 512Mb 1GbSlide12: THE SPANSION PORTFOLIO – 1.8V MirrorBit™ Burst Mode XIP « Same Die Stack 256 Mb 256 Mb 256 Mb 512 Mb 512 Mb 128 Mb 128 Mb 128 Mb 1024 Mb «1024 Mb 1024 Mb «1024 Mb 512 Mb «512 Mb 512 Mb 256 Mb 256 Mb 256 Mb 128 Mb 128 Mb 128 Mb 1.8-VOLT NS (Multiplexed) Family WS (Demultiplexed) Family WS-N, WS-P, WS-R Burst mode, De-Mux Interface 80MHz (WS-N) /108MHz (WS-P) burst read speed 80ns Asynchronous access 8 Word Page Access (WS-P & WS-R), 4 Word Page (WS-N) Simultaneous Read/Write Advanced Sector Protection 32-Word Write Buffer Erase / Program Suspend / Resume 64 Mb NS-N, NS-P, NS-R Burst mode Multiplexed Interface 66MHz (NS-N) /108MHz (NS-P) burst read speed 80ns Asynchronous access Simultaneous Read / Write Advanced Sector Protection 32-Word Write Buffer Erase / Program Suspend / ResumeSlide13: Burst mode De-Multiplexed Interface 54-108MHz burst read with 55-45 ns Asynch. access Simultaneous Read/Write Advanced Sector Protection Erase/Program Suspend/Resume 32Mb has 3.0V Vio WS-J, WS-K WS (Demultiplexed) Family Burst Mode Multiplexed Interface 54-66MHz burst read with 70-65 ns Asynchronous access Simultaneous Read/Write Advanced Sector Protection Erase / Program Suspend / Resume NS-J NS (Multiplexed) Family THE SPANSION PORTFOLIO – 1.8V Floating Gate Burst Mode XIP « Same Die Stack 1.8-VOLT 64 Mb 128 Mb 32 Mb 16 Mb 64 Mb 64 Mb 128 Mb «256 Mb 128 MbSlide14: 1.8-Volt MS-P, MS-R 1.8V MirrorBit™ x8 and x16 bus widths Xtreme Mode / NAND Interface No ECC/EDC Required Large Page/Block 2 Gb 1 Gb 1 Gb 512 Mb KS-R 1.8V MirrorBit™ Multiplexed NOR Interface Scalable Data Storage (ORNAND) 2 Gb 4 Gb 1 Gb «8 Gb 512 Mb MS (NAND I/F) Family KS (NOR I/F, Multiplexed) Family « Same Die Stack 512 Mb ML-P, ML-R 3.0V MirrorBit™ x8 and x16 bus widths Xtreme Mode / NAND Interface 3.0-Volt 1 Gb 2 Gb 512 Mb ML (NAND I/F) Family 1 Gb 2 Gb 512 Mb 4 Gb Slide15: PL-N High Performance w/SRW Page mode 65ns asynchronous access 25ns page access Simultaneous Read-Write Advanced Sector Protection 32-Word Write Buffer GL-N, GL-P Mainstream Page mode 110 nm (90-110/25) ns (GL-N) Page mode 90 nm (110/25) ns (GL-P) Advanced Sector Protection 16 (110 nm) / 32 (90-65 nm) Word Write Buffer THE SPANSION PORTFOLIO – 3.0V MirrorBit™ Page Mode XIP GL Family Mainstream PL Family High Performance w/ SRW 3.0-VOLT MID-HIGH DENSITY XIP 1 Gb 2H’07 1H’07 Q4’06 Q3’06 Q2’06 Q1’06 « Same Die Stack 512 Mb 512 Mb 64 MbSlide16: THE SPANSION PORTFOLIO – 3.0V Mid / Low Density XIP 3.0-VOLT MID and LOW DENSITY XIP Technology Key: 230 nm 200 nm 130nm 110 nm 90nm Floating Gate Technology GL-A, GL-N Performance & Value Up to 90 ns access Page mode Advanced Sector Protection (110 nm) GL Family 16 Mb 64 Mb 64 Mb 32 Mb 32 Mb MirrorBit™ Technology PL-J High Performance w/SRW Up to 55 ns access Simultaneous read-write Page mode (PL) Advanced Sector Protection (PL) PL Family 64 Mb 32 Mb 1H’07 Q4’06 Q3’06 Q2’06 Q1’06 2H’07Slide17: Agenda Spansion Introduction Spansion Flash Roadmap 3V MCP Product Strategy ORNAND™ MCP Product Strategy 1.8V MCP Product Strategy3V Low/Mid-Density Recommended MCPs: 3V Low/Mid-Density Recommended MCPs NOW Type 2 SEC UTRAM PL064J + 32p S71PL064JB0BxWQB NOW Type 3 E-Tron PL064J + 16p S71PL064JA0BxW0B Contact Factory Type 4 Cypress PL064J + 8p S71PL064J80BxW07 NOW Type 3 E-Tron PL032J + 16p S71PL032JA0BxWQF Contact Factory Type 4 Cypress PL032J + 8p S71PL032J80BxWQ7 NOW 7x9mm, 56 balls Type 4 Cypress PL032J + 4p S71PL032J40BxW0K Status Package Spec RAM Supplier Combo MCP OPN Contact Factory Type 7 Fujitsu FCRAM GL032A + 16p S71GL032AA0BxW0U/0Z NOW Type 7 Fujitsu FCRAM GL064A + 16p S71GL064AA0BxW0Z/0U NOW Type 2 SEC SRAM GL064A + 8S S71GL064A08BxW0F/0B Contact Factory Type 4 Cypress GL032A + 8p S71GL032A80BxW0K/0P NOW Type 4 Cypress GL032A + 4p S71GL032A40BxW0F/0B NOW 7x9mm, 56 balls Type 4 Cypress GL016A + 4p S71GL016A40BxW1J/3J New RAM qualification: 8Mb Cypress pSRAM replaces SEC SRAM New MCP combination: 32Mb GL-A + 16Mb pSRAM Floating Gate Mirror Bit™GL-A MirrorBit Chipset Support: GL-A MirrorBit Chipset SupportSpansion Universal Pinout: MCP or Flash- Flexible Solution for Ultra-Low Cost Phones: Spansion Universal Pinout: MCP or Flash - Flexible Solution for Ultra-Low Cost Phones In the Ultra-Low Cost market, customers want flexibility Spansion Universal Pinout makes it easy to support two memory options: MCP (Flash + RAM in single package from single source) Flash & RAM (2 packages, 2 sources) Flash Only RAM Only BB MCP Only RAM Only BB MCP or Flash Other suppliers require 3 sockets for maximum flexibility Spansion enables 1 socket for flexibility/saving space (GL016A, GL032A, PL032J only)3V HI-Density Recommended MCPs: 3V HI-Density Recommended MCPs PL256N + 128p S71PL256ND0GxW5B PL256N + 64p S71PL256NC0HxW5B PL129N + 64p S71PL129NC0HxW4B PL127N + 64p S71PL127NC0HxW4B PL129N + 32p S71PL129NB0HxW4B NOW 8x11.6mm, 84 balls Type 2 Samsung PL127N + 32p S71PL127NB0HxW4B Status Package Spec RAM Supplier Combo MCP OPN Mirror Bit™PL-N MirrorBit Chipset Support: PL-N MirrorBit Chipset SupportSpansion Customer Centricity: Spansion Customer Centricity Universal pinout with same core - Easy migration from 16Mb to 4Gb 56-Ball Max Flash: 64Mb 16Mb-64Mb NOR 4Mb-32Mb pSRAM 64-Ball Max Flash: 128Mb 128Mb NOR 32Mb-64Mb pSRAM 84-Ball Max Flash: 4Gb 256Mb-2Gb Code/Data* 64Mb-512Mb pSRAM 137-Ball Max Flash: 4Gb 256Mb-2Gb Code/Data* 128Mb-512Mb SDRAM * MirrorBit™ NOR and MirrorBit ORNAND™ Time to Market with Scalable PlatformSpansion Look-Ahead Pinout- Support 3in1 & 2in1 MCPs on the same PCB: Spansion Look-Ahead Pinout - Support 3in1 & 2in1 MCPs on the same PCB NOR/pSRAM/ORNAND (Bus 1) NOR/pSRAM (Bus 1) ORNAND (Bus 2) Prepare customers for smooth migration to 3-1 ORNAND MCPs Know the baseband and back-end IC to support the right pinout! 84-ball Pinout 115-ball PinoutSlide25: Agenda Spansion Introduction Spansion Flash Roadmap 3V MCP Product Strategy ORNAND™ MCP Product Strategy 1.8V MCP Product StrategySpansion MCP Solutions: A Broad Selection to Speed Time to Market NOR ORNANDTM SDRAM DDRAM (p)SRAM Mbits 2–4 8 16 32 64 128 256 512 1024 2048 Spansion MCP SolutionsTHE SPANSION PORTFOLIO – MCP ARCHITECTURE GUIDE: THE SPANSION PORTFOLIO – MCP ARCHITECTURE GUIDESlide28: 11090 nm Demultiplexed MB and FG Roadmap Q2’05 Q3’05 Q4’05 Q1’06 Q2’06 2H’06 A M J J A S O N D J F M A M J J A S O N D 110 nm FG 110 nm MB 90 nm MB 90 nm FG Major S/W effort required Different Bank Architecture Address v. Command based Configuration Registers No FG offered beyond 90 nm Recommend Migrating to Mirrorbit Designed for easy migration Same Footprint Identical command set and bank/sector Architecture Better Performance Higher frequencies 108MHz+, 7 ns tBACC 8 word Page Access support ES Q In Production Slide29: WS128 WS256 WS512 THE SPANSION PORTFOLIO – MCP Roadmap for WS Family 64p S71WS512NC0 128p S71WS512ND0 32p S71WS128NB0 64p S71WS128NC0 64p S71WS256NC0 128p S71WS256ND0 S73WS256ND0 128D S72WS256ND0 128D + WS256N S72WS256NDE S73WS256NDE 256D + WS256N S72WS256NEE S73WS256NEE WS-N MCP Family MCP/POP WS with pSRAM OR DRAM MS (Optional ORNAND data) WS-N, WS-P, WS-R Burst mode De-Multiplexed Interface 54-133MHz burst read 80ns Asynchronous access Simultaneous Read/Write Advanced Sector Protection 32-Word Write Buffer Erase / Prog Susp / Resume MS-P, MS-R 1.8V MirrorBit™ x8 and x16 bus widths Xtreme Mode / NAND Interface No ECC/EDC Required Large Page/Block pSRAM: S71, S75 Non-Multiplexed Interface 66-104MHz Burst mode 70 ns Async access DRAM: S72, S73 SDR or DDR x16/x32 104-133MHz burst mode S72: DRAM (Bus 2) S73: DRAM (Bus 1 with NOR) S71WS512PD0 S71WS256PD0 S72WS512PD0 S73WS512PD0 S72WS512PE0 S73WS512PE0 256p + MS01GP S75WS256NEG S72WS256PD0 512D + MS01GP S72WS512PFG 512D + MS512P S72WS512PFF110nm WS-N 90nm WS-P: 110nm WS-N 90nm WS-P WS-N Family WS-P Family Identical Number of Banks = 16 Identical T/B Boot Sectors = 4 (16Kw) Each Identical All Other Sectors = 512Mb =510(64KW) Sectors 256Mb =254 (64Kw) Sectors 128Mb =126 (64Kw) Sectors WS256N 16Mb 15 16Mb 14 16Mb 8 16Mb 13 16Mb 12 16Mb 11 16Mb 10 16Mb 9 16Mb 7 16Mb 6 16Mb 0 16Mb 5 16Mb 4 16Mb 3 16Mb 2 16Mb 1 WS128N 15 14 8 13 12 11 10 9 7 6 0 5 4 3 2 8Mb 8Mb 8Mb 8Mb 8Mb 8Mb 8Mb 8Mb 8Mb 8Mb 8Mb 8Mb 8Mb 8Mb 8Mb 8Mb 1 WS128P 15 14 8 13 12 11 10 9 7 6 0 5 4 3 2 8Mb 8Mb 8Mb 8Mb 8Mb 8Mb 8Mb 8Mb 8Mb 8Mb 8Mb 8Mb 8Mb 8Mb 8Mb 8Mb 1 WS256P 16Mb 15 16Mb 14 16Mb 8 16Mb 13 16Mb 12 16Mb 11 16Mb 10 16Mb 9 16Mb 7 16Mb 6 16Mb 0 16Mb 5 16Mb 4 16Mb 3 16Mb 2 16Mb 1 WS512P 32Mb 15 32Mb 14 32Mb 8 32Mb 13 32Mb 12 32Mb 11 32Mb 10 32Mb 9 32Mb 7 32Mb 6 32Mb 0 32Mb 5 32Mb 4 32Mb 3 32Mb 2 32Mb 1 Identical Bank & Sector Architecture: No Major SW changes required Design with WS-N, MP with WS-P with best pricing!Intel M18 (Sibley) Competitive Summary: Intel M18 (Sibley) Competitive Summary Spansion Advantages Easy Migration Similar package foot print between 110nm and 90nm Same bank / sector / boot architecture for easy S/W migration from 110nm to 90nm Better performance Faster Asynch Access (80 versus 93 ns) Lower Programming, Erase, and Standby current M18 (Sibley) issues: Major Software Migration: Requires FDI 6.x or 7.x New architecture 2x sector size No more dual boot partition (no WP# pin) 128Mb not included in 90nm promotion Expected production ramp 1H’06 90 nm capacity constraint rumors (Intel uses the same process / Fab for PC chipsets) Tyax Footprint Difference RFU Sibley 107 ballWS MirrorBit Chipset Support- Identify the available business: WS MirrorBit Chipset Support - Identify the available businessSpansion Look-Ahead Pinout- Consider the RAM type in 1.8V MCPs: Spansion Look-Ahead Pinout - Consider the RAM type in 1.8V MCPs Customers using SDRAM need support to choose an OPN Know the baseband to support the right pinout! Code/pSRAM/Data/SDR/DDR ALL ON SAME BUS Code/pSRAM/Data + SDR/DDR ON SPLIT BUS 137-ball pinout 137-ball pinoutSlide34: 11090 nm Multiplexed Roadmap - TI Locosto, Neptune customer focus Q2’05 Q’3 05 Q4’05 Q1’06 Q2’06 H2’ 06 NS512N 2X NS256N NS256P NS128P NS064J NS032J NS016J NS128J NS256N NS512P NS128N NS064N A M J J A S O N D J F M A M J J A S O N D Address & Data Bus Combined = Multiplexed MB designed for easy migration Same Architecture Identical command set and bank/sector Architecture Use the alignment presentation from Marketing Floating Gate Will be replaced by a new product family in 90nm New product family will be compatible to NS-J Migration information will be available in Q3’06 110 nm FG 110 nm MB 90 nm MB ES Q In Production Slide35: NS032 THE SPANSION PORTFOLIO – MCP Roadmap for NS Family NS064 NS128 NS256 MCP/POP NS with pSRAM OR DRAM MS (Optional ORNAND data) NS-N, NS-P, NS-R Burst mode Multiplexed Interface 54-133Mhz burst read 80ns Asynchronous access Simultaneous Read / Write Advanced Sector Protection Erase / Prog Susp / Resume MS-P, MS-R 1.8V MirrorBit™ x8 and x16 bus widths Xtreme Mode / NAND Interface No ECC/EDC Required Large Page/Block pSRAM: S71 Multiplexed Interface 54-104MHz burst read 70 ns Async access DRAM: S72 SDR or DDR on Bus 2 x16 104-133MHz burst mode NS MCP Family NS512 S72NS512PE0Slide36: Agenda Spansion Introduction Spansion Flash Roadmap 3V MCP Product Strategy ORNAND™ MCP Product Strategy 1.8V MCP Product StrategyIt’s a Code and Data World!: It’s a Code and Data World! Platform Architecture Density & Performance Flash Memory SoC MirrorBitTM Code Data Spansion MirrorBit™ ORNAND™: Spansion MirrorBit™ ORNAND™ NOR Advantages Fast random read & write Low-latency XIP Fast Sequential Read Ultra Reliable NOR Advantages (Optimized for Modem, OS, Apps) NAND Advantages (Optimized for Storage) NAND Advantages Fast Write Low Cost High Density New Architecture Based on MirrorBit™ Technology – Leverages high density and cost structure Faster write than NOR and faster read than NAND Enables optimal Flash memory solutions for wireless market ORNAND™MirrorBit™ ORNAND™ Scaling: MirrorBit™ ORNAND™ Scaling mm2 0 20 40 60 80 MirrorBit™ ORNAND™ MS Family NAND 90 Supplier 1 Supplier 2 Supplier 3 Source: Spansion estimates, August 2005 1Gb NAND Die size: 80-90 mm² 1Gb MirrorBitTM ORNANDTM Die size: 82 mm² Competition 1 Gb 90 nm Die SizesORNAND™ Reliability Advantage: Some Bad Blocks Traditional NAND ORNAND™ Reliability Advantage Simpler software and faster development schedule No need for complex file system to dynamically map out bad blocks Good Block Bad Block 1.8V,MS-P MCP support plan: 1.8V,MS-P MCP support plan X8MS01GP+2X256X8SDRAM---also_available_as_ES X16MS01GP+512SDRAM(X32)in_evaluation—Qualcom_MSM6280 Pls_contact_our_sales_if_you_have_different_combination_request!! MS-P Chipset Compatibility: MS-P Chipset Compatibility3V,S75PL+ML MCP Support Plan: 3V,S75PL+ML MCP Support Plan All timelines are production estimates Spansion Pinout FMH107 Spansion Pinout FMH107 Replaces all current S99-50149 designs NOR+pSRAM same bus, ORNAND on a separate bus 3-in-1 3V ORNAND MCP (S75PL-N) Configuration & Schedule: 3-in-1 3V ORNAND MCP (S75PL-N) Configuration & Schedule MCP Products under development 128Mb NOR + 32 pSRAM + 512Mb ORNAND Base OPN: S75PL127NBF (S29PL127N+32p+S30ML512P) ES: WW 25 (Mid-June 2006) QS: WW 38 (Mid-Sept 2006) 128Mb NOR + 64 pSRAM + 1Gb ORNAND Base OPN: S75PL127NCG (S29PL127N+64p+S30ML01GP) ES: WW 27 (End-of-June 2006) QS: WW 40 (End-of-Sept 2006) MCP Products under consideration (based on customer demand & volume) 128Mb NOR + 32 pSRAM + 1Gb ORNAND 128Mb NOR + 64 pSRAM + 512Mb ORNAND Any other density combinations, pls_contact_our_sales_to_request!!3-in-1 3V ORNAND MCP (S75PL-N) Configuration & Schedule: 3-in-1 3V ORNAND MCP (S75PL-N) Configuration & Schedule Can_your_customer_accept_to_adjust_current_S/W_for_block_size?3-in-1 3V ORNAND MCP (S75PL-N) Pinout: 3-in-1 3V ORNAND MCP (S75PL-N) Pinout S75PL-N configuration Bus 1 S29PL-N (Code Flash) pSRAM ( Buffer RAM) Bus 2 S30ML-P (ORNAND Data Flash) Package Pinout: 107 ball Package Size 512Mb ORNAND (ML512P) MCP: 9x12 1Gb ORNAND (ML01GP) MCP: 11x13 3-in-1 1.8V ORNAND MCP: 3-in-1 1.8V ORNAND MCP SPANSION 137-ball NAND (Bus1) + DRAM (Bus2) SPANSION 115-ball NOR (Bus1) + PSRAM (Bus1) + NAND (Bus2)Trademark Attribution: Trademark Attribution Spansion, the Spansion Logo and combinations thereof are trademarks of Spansion LLC. Other product names used in this presentation are for identification purposes only and may be trademarks of their respective companies. You do not have the permission to view this presentation. In order to view it, please contact the author of the presentation.
200714 11 7 8 Janelle Download Post to : URL : Related Presentations : Share Add to Flag Embed Email Send to Blogs and Networks Add to Channel Uploaded from authorPOINTLite Insert YouTube videos in PowerPont slides with aS Desktop Copy embed code: (To copy code, click on the text box) Embed: URL: Thumbnail: WordPress Embed Customize Embed The presentation is successfully added In Your Favorites. Views: 184 Category: Entertainment License: All Rights Reserved Like it (1) Dislike it (0) Added: November 15, 2007 This Presentation is Public Favorites: 0 Presentation Description No description available. Comments Posting comment... Premium member Presentation Transcript Slide1: SPANSION PRESENTATION Spansion Introduction ORNAND™ MCP Product Strategy Spansion Flash Roadmap 1.8V MCP Product Strategy 3V MCP Product StrategySlide2: Spansion Awards Spansion has received numerous awards for outstanding customer service, technical innovation, and industry distinction. 2005 – Levono Best Supplier Award 2005 – Cisco Supplier of the Year 2005 – Samsung Supplier of the Year 2005 – EDN Leading Product Award 2005 – EDN China Innovation Award 2005 – IT 168 Excellent Technology Award 2005 – Outstanding Employer in Asia 2005 – Best Employer in Thailand 2004 – Samsung Most Valued Partner 2004 – Lenovo Best Supplier Award 2004 – Stack International Gold Award for Quality, Delivery and Service 2002, 2000 – Nortel Networks Supplier of the Year 2002, 2000 – Samsung Best Supplier 2001-2002 – Bosch Top Supplier Award 2000 – Cisco President's Customer Satisfaction Award 1999-2000 – Bosch Top Memory Supplier 1999 – Cisco Supplier of the Year 1999 – Volkswagen Leading Edge Corporate Supplier of the Year 1997 – EDN Innovator of the Year © 2006 Spansion All Rights Reserved | Copyright | Privacy Policy Slide3: Spansion is dedicated to enabling, storing and protecting digital content in the automotive, consumer electronics, networking and wireless markets. As the largest company exclusively focused on Flash memory solutions, Spansion has one of the most diverse and comprehensive Flash product lines on the market. Spansion is solely focused on the integrated electronics market, in which Flash memory resides in the device. In this market segment, customers value differentiated systems with high quality and performance. Blue chip customers in the integrated segment who use Spansion Flash memory products include the top 10 original equipment manufacturers for automotive electronics, consumer electronics and handsets. By leveraging cutting-edge advancements such as the award-winning MirrorBit™ technology, Spansion has successfully developed cost-effective, smaller and more powerful product offerings designed for reliable code execution and data storage. Offering a NOR architecture for code and ORNAND™ architecture for scalable data storage, Spansion’s customers can maintain a common platform and scale the amount of data storage necessary for various applications. Advanced manufacturing capabilities, four dedicated production Flash memory wafer fabs and a development fab enable us to accelerate the introduction of next-generation technologies. As a result, Spansion has developed highly scalable solutions that provide a smooth migration path to future products and technologies over time to meet customers’ evolving requirements. Our world-class, system-level design support leverages the expertise of a dedicated software development team and design engineers to partner with customers and complementary silicon and software providers to optimize systems that incorporate Flash memory. These offerings come with world-class sales, customer service and technical support. Spansion, publicly traded on NASDAQ [SPSN], was previously a joint venture of AMD and Fujitsu and draws upon a rich history of technological innovation and market leadership that dates back to the early days of the Flash market. Spansion has approximately 8,400 employees around the globe. Spansion Asia WSD Marketing Key Roles: Spansion Asia WSD Team Daniel Koh Spansion Asia WSD Marketing Key Roles Platform Marketing & Ref. Design Coordination for Overseas chipsets only Execution of long term Marketing strategy New Product definition & Eco-system analysis Product Portfolio Marketing Future customer products needs interface CHINA CHINA TAIWAN/ROA ASIA Jasson Xu Segment Marketing Jorken Chen Segment Marketing Mike Narodovich Technical Marketing Jessie Yang Business Marketing Responsible for market share analysis (TAM, SAM, SOM) Execution of migration and cost reduction strategy with Field Identify new business opportunities with Field. Product Portfolio Marketing Business Marketing interface for current & forward quarter pricing quotes Execution of short term Marketing strategy with HQ, Interface with factory for Urgent or Priority shipment Track & report pricing trend Maintain Quote Log Responsible for market share analysis (TAM, SAM, SOM) Execution of migration and cost reduction strategy with Field Identify new business opportunities with Field Product Portfolio Marketing Mediatek Account Manager Slide5: Spansion Introduces Family of Highest Performing NOR Flash Memory Combination of MirrorBit NOR and ORNAND brings more powerful multimedia functionality to handsets Spansion Enters NAND portion of cellular market Launch of MirrorBit™ ORNAND™ Scalable memory sub-systems for mobile phones Spansion Brings Secure MirrorBit Technology to SIM MarketSpansion 2005 Market Share*: Spansion 2005 Market Share* Spansion #1 in NOR Market in Q4 2005* Spansion 27.5% STM 15.3% Intel 27.5% * Source: iSuppli Preliminary 2005 Market Share, February 2006 * Based on end customer sales 0 500 1,000 1,500 2,000 2,500 Intel Spansion STM Samsung Toshiba Sharp SST Renesas Micron Other ($M) Spansion $2 Billion revenues in 2005Slide7: Agenda Spansion Introduction Spansion Flash Roadmap ORNAND™ MCP Product Strategy 1.8V MCP Product Strategy 3V MCP Product StrategySpansion TechnologyMirrorBit™ Momentum: 2000 2001 2002 2003 2004 2005 2006 3V MirrorBit sampling 3V MirrorBit production 1.8V MirrorBit production 1998 1999 MirrorBit Research Start 256 Mb, 80MHz, 1.8V, 110nm 16 Mb – 256 Mb 230nm 64 Mb 230nm 512 Mb 110nm Spansion Technology MirrorBit™ Momentum Announced MirrorBit™ Three years to Density & Performance Leadership Four Years to Develop 512 Mb, 133MHz, 1.8V, 90nm MirrorBit ORNAND™, 1.8V, 90nm MirrorBit™ Technology Focus: MirrorBit™ Technology Focus NOR NAND Cost Logic Integration Write Read Density Reliability Integrated Market Strong Neutral Weak MirrorBit™ MirrorBit™ Technology – Conceptual Diagram: MirrorBit™ Technology – Conceptual Diagram Fundamentally different technology to Floating gate with unique advantages MirrorBit™ cell uses a non-conducting planar storage medium Stores full charge in two physically distinct locations on either side of the cell 40% fewer critical steps and at least 10% fewer total stepsSlide11: 1.8V 3.0V NS Family WS Family MS Family GL Family PL Family Optimized for wireless applications including 3G cellular phones High density data storage Leading price-performance page mode Page Mode with simultaneous read/write 8Mb 16Mb 4Mb 32Mb 64Mb 128Mb 256Mb 512Mb 1GbSlide12: THE SPANSION PORTFOLIO – 1.8V MirrorBit™ Burst Mode XIP « Same Die Stack 256 Mb 256 Mb 256 Mb 512 Mb 512 Mb 128 Mb 128 Mb 128 Mb 1024 Mb «1024 Mb 1024 Mb «1024 Mb 512 Mb «512 Mb 512 Mb 256 Mb 256 Mb 256 Mb 128 Mb 128 Mb 128 Mb 1.8-VOLT NS (Multiplexed) Family WS (Demultiplexed) Family WS-N, WS-P, WS-R Burst mode, De-Mux Interface 80MHz (WS-N) /108MHz (WS-P) burst read speed 80ns Asynchronous access 8 Word Page Access (WS-P & WS-R), 4 Word Page (WS-N) Simultaneous Read/Write Advanced Sector Protection 32-Word Write Buffer Erase / Program Suspend / Resume 64 Mb NS-N, NS-P, NS-R Burst mode Multiplexed Interface 66MHz (NS-N) /108MHz (NS-P) burst read speed 80ns Asynchronous access Simultaneous Read / Write Advanced Sector Protection 32-Word Write Buffer Erase / Program Suspend / ResumeSlide13: Burst mode De-Multiplexed Interface 54-108MHz burst read with 55-45 ns Asynch. access Simultaneous Read/Write Advanced Sector Protection Erase/Program Suspend/Resume 32Mb has 3.0V Vio WS-J, WS-K WS (Demultiplexed) Family Burst Mode Multiplexed Interface 54-66MHz burst read with 70-65 ns Asynchronous access Simultaneous Read/Write Advanced Sector Protection Erase / Program Suspend / Resume NS-J NS (Multiplexed) Family THE SPANSION PORTFOLIO – 1.8V Floating Gate Burst Mode XIP « Same Die Stack 1.8-VOLT 64 Mb 128 Mb 32 Mb 16 Mb 64 Mb 64 Mb 128 Mb «256 Mb 128 MbSlide14: 1.8-Volt MS-P, MS-R 1.8V MirrorBit™ x8 and x16 bus widths Xtreme Mode / NAND Interface No ECC/EDC Required Large Page/Block 2 Gb 1 Gb 1 Gb 512 Mb KS-R 1.8V MirrorBit™ Multiplexed NOR Interface Scalable Data Storage (ORNAND) 2 Gb 4 Gb 1 Gb «8 Gb 512 Mb MS (NAND I/F) Family KS (NOR I/F, Multiplexed) Family « Same Die Stack 512 Mb ML-P, ML-R 3.0V MirrorBit™ x8 and x16 bus widths Xtreme Mode / NAND Interface 3.0-Volt 1 Gb 2 Gb 512 Mb ML (NAND I/F) Family 1 Gb 2 Gb 512 Mb 4 Gb Slide15: PL-N High Performance w/SRW Page mode 65ns asynchronous access 25ns page access Simultaneous Read-Write Advanced Sector Protection 32-Word Write Buffer GL-N, GL-P Mainstream Page mode 110 nm (90-110/25) ns (GL-N) Page mode 90 nm (110/25) ns (GL-P) Advanced Sector Protection 16 (110 nm) / 32 (90-65 nm) Word Write Buffer THE SPANSION PORTFOLIO – 3.0V MirrorBit™ Page Mode XIP GL Family Mainstream PL Family High Performance w/ SRW 3.0-VOLT MID-HIGH DENSITY XIP 1 Gb 2H’07 1H’07 Q4’06 Q3’06 Q2’06 Q1’06 « Same Die Stack 512 Mb 512 Mb 64 MbSlide16: THE SPANSION PORTFOLIO – 3.0V Mid / Low Density XIP 3.0-VOLT MID and LOW DENSITY XIP Technology Key: 230 nm 200 nm 130nm 110 nm 90nm Floating Gate Technology GL-A, GL-N Performance & Value Up to 90 ns access Page mode Advanced Sector Protection (110 nm) GL Family 16 Mb 64 Mb 64 Mb 32 Mb 32 Mb MirrorBit™ Technology PL-J High Performance w/SRW Up to 55 ns access Simultaneous read-write Page mode (PL) Advanced Sector Protection (PL) PL Family 64 Mb 32 Mb 1H’07 Q4’06 Q3’06 Q2’06 Q1’06 2H’07Slide17: Agenda Spansion Introduction Spansion Flash Roadmap 3V MCP Product Strategy ORNAND™ MCP Product Strategy 1.8V MCP Product Strategy3V Low/Mid-Density Recommended MCPs: 3V Low/Mid-Density Recommended MCPs NOW Type 2 SEC UTRAM PL064J + 32p S71PL064JB0BxWQB NOW Type 3 E-Tron PL064J + 16p S71PL064JA0BxW0B Contact Factory Type 4 Cypress PL064J + 8p S71PL064J80BxW07 NOW Type 3 E-Tron PL032J + 16p S71PL032JA0BxWQF Contact Factory Type 4 Cypress PL032J + 8p S71PL032J80BxWQ7 NOW 7x9mm, 56 balls Type 4 Cypress PL032J + 4p S71PL032J40BxW0K Status Package Spec RAM Supplier Combo MCP OPN Contact Factory Type 7 Fujitsu FCRAM GL032A + 16p S71GL032AA0BxW0U/0Z NOW Type 7 Fujitsu FCRAM GL064A + 16p S71GL064AA0BxW0Z/0U NOW Type 2 SEC SRAM GL064A + 8S S71GL064A08BxW0F/0B Contact Factory Type 4 Cypress GL032A + 8p S71GL032A80BxW0K/0P NOW Type 4 Cypress GL032A + 4p S71GL032A40BxW0F/0B NOW 7x9mm, 56 balls Type 4 Cypress GL016A + 4p S71GL016A40BxW1J/3J New RAM qualification: 8Mb Cypress pSRAM replaces SEC SRAM New MCP combination: 32Mb GL-A + 16Mb pSRAM Floating Gate Mirror Bit™GL-A MirrorBit Chipset Support: GL-A MirrorBit Chipset SupportSpansion Universal Pinout: MCP or Flash- Flexible Solution for Ultra-Low Cost Phones: Spansion Universal Pinout: MCP or Flash - Flexible Solution for Ultra-Low Cost Phones In the Ultra-Low Cost market, customers want flexibility Spansion Universal Pinout makes it easy to support two memory options: MCP (Flash + RAM in single package from single source) Flash & RAM (2 packages, 2 sources) Flash Only RAM Only BB MCP Only RAM Only BB MCP or Flash Other suppliers require 3 sockets for maximum flexibility Spansion enables 1 socket for flexibility/saving space (GL016A, GL032A, PL032J only)3V HI-Density Recommended MCPs: 3V HI-Density Recommended MCPs PL256N + 128p S71PL256ND0GxW5B PL256N + 64p S71PL256NC0HxW5B PL129N + 64p S71PL129NC0HxW4B PL127N + 64p S71PL127NC0HxW4B PL129N + 32p S71PL129NB0HxW4B NOW 8x11.6mm, 84 balls Type 2 Samsung PL127N + 32p S71PL127NB0HxW4B Status Package Spec RAM Supplier Combo MCP OPN Mirror Bit™PL-N MirrorBit Chipset Support: PL-N MirrorBit Chipset SupportSpansion Customer Centricity: Spansion Customer Centricity Universal pinout with same core - Easy migration from 16Mb to 4Gb 56-Ball Max Flash: 64Mb 16Mb-64Mb NOR 4Mb-32Mb pSRAM 64-Ball Max Flash: 128Mb 128Mb NOR 32Mb-64Mb pSRAM 84-Ball Max Flash: 4Gb 256Mb-2Gb Code/Data* 64Mb-512Mb pSRAM 137-Ball Max Flash: 4Gb 256Mb-2Gb Code/Data* 128Mb-512Mb SDRAM * MirrorBit™ NOR and MirrorBit ORNAND™ Time to Market with Scalable PlatformSpansion Look-Ahead Pinout- Support 3in1 & 2in1 MCPs on the same PCB: Spansion Look-Ahead Pinout - Support 3in1 & 2in1 MCPs on the same PCB NOR/pSRAM/ORNAND (Bus 1) NOR/pSRAM (Bus 1) ORNAND (Bus 2) Prepare customers for smooth migration to 3-1 ORNAND MCPs Know the baseband and back-end IC to support the right pinout! 84-ball Pinout 115-ball PinoutSlide25: Agenda Spansion Introduction Spansion Flash Roadmap 3V MCP Product Strategy ORNAND™ MCP Product Strategy 1.8V MCP Product StrategySpansion MCP Solutions: A Broad Selection to Speed Time to Market NOR ORNANDTM SDRAM DDRAM (p)SRAM Mbits 2–4 8 16 32 64 128 256 512 1024 2048 Spansion MCP SolutionsTHE SPANSION PORTFOLIO – MCP ARCHITECTURE GUIDE: THE SPANSION PORTFOLIO – MCP ARCHITECTURE GUIDESlide28: 11090 nm Demultiplexed MB and FG Roadmap Q2’05 Q3’05 Q4’05 Q1’06 Q2’06 2H’06 A M J J A S O N D J F M A M J J A S O N D 110 nm FG 110 nm MB 90 nm MB 90 nm FG Major S/W effort required Different Bank Architecture Address v. Command based Configuration Registers No FG offered beyond 90 nm Recommend Migrating to Mirrorbit Designed for easy migration Same Footprint Identical command set and bank/sector Architecture Better Performance Higher frequencies 108MHz+, 7 ns tBACC 8 word Page Access support ES Q In Production Slide29: WS128 WS256 WS512 THE SPANSION PORTFOLIO – MCP Roadmap for WS Family 64p S71WS512NC0 128p S71WS512ND0 32p S71WS128NB0 64p S71WS128NC0 64p S71WS256NC0 128p S71WS256ND0 S73WS256ND0 128D S72WS256ND0 128D + WS256N S72WS256NDE S73WS256NDE 256D + WS256N S72WS256NEE S73WS256NEE WS-N MCP Family MCP/POP WS with pSRAM OR DRAM MS (Optional ORNAND data) WS-N, WS-P, WS-R Burst mode De-Multiplexed Interface 54-133MHz burst read 80ns Asynchronous access Simultaneous Read/Write Advanced Sector Protection 32-Word Write Buffer Erase / Prog Susp / Resume MS-P, MS-R 1.8V MirrorBit™ x8 and x16 bus widths Xtreme Mode / NAND Interface No ECC/EDC Required Large Page/Block pSRAM: S71, S75 Non-Multiplexed Interface 66-104MHz Burst mode 70 ns Async access DRAM: S72, S73 SDR or DDR x16/x32 104-133MHz burst mode S72: DRAM (Bus 2) S73: DRAM (Bus 1 with NOR) S71WS512PD0 S71WS256PD0 S72WS512PD0 S73WS512PD0 S72WS512PE0 S73WS512PE0 256p + MS01GP S75WS256NEG S72WS256PD0 512D + MS01GP S72WS512PFG 512D + MS512P S72WS512PFF110nm WS-N 90nm WS-P: 110nm WS-N 90nm WS-P WS-N Family WS-P Family Identical Number of Banks = 16 Identical T/B Boot Sectors = 4 (16Kw) Each Identical All Other Sectors = 512Mb =510(64KW) Sectors 256Mb =254 (64Kw) Sectors 128Mb =126 (64Kw) Sectors WS256N 16Mb 15 16Mb 14 16Mb 8 16Mb 13 16Mb 12 16Mb 11 16Mb 10 16Mb 9 16Mb 7 16Mb 6 16Mb 0 16Mb 5 16Mb 4 16Mb 3 16Mb 2 16Mb 1 WS128N 15 14 8 13 12 11 10 9 7 6 0 5 4 3 2 8Mb 8Mb 8Mb 8Mb 8Mb 8Mb 8Mb 8Mb 8Mb 8Mb 8Mb 8Mb 8Mb 8Mb 8Mb 8Mb 1 WS128P 15 14 8 13 12 11 10 9 7 6 0 5 4 3 2 8Mb 8Mb 8Mb 8Mb 8Mb 8Mb 8Mb 8Mb 8Mb 8Mb 8Mb 8Mb 8Mb 8Mb 8Mb 8Mb 1 WS256P 16Mb 15 16Mb 14 16Mb 8 16Mb 13 16Mb 12 16Mb 11 16Mb 10 16Mb 9 16Mb 7 16Mb 6 16Mb 0 16Mb 5 16Mb 4 16Mb 3 16Mb 2 16Mb 1 WS512P 32Mb 15 32Mb 14 32Mb 8 32Mb 13 32Mb 12 32Mb 11 32Mb 10 32Mb 9 32Mb 7 32Mb 6 32Mb 0 32Mb 5 32Mb 4 32Mb 3 32Mb 2 32Mb 1 Identical Bank & Sector Architecture: No Major SW changes required Design with WS-N, MP with WS-P with best pricing!Intel M18 (Sibley) Competitive Summary: Intel M18 (Sibley) Competitive Summary Spansion Advantages Easy Migration Similar package foot print between 110nm and 90nm Same bank / sector / boot architecture for easy S/W migration from 110nm to 90nm Better performance Faster Asynch Access (80 versus 93 ns) Lower Programming, Erase, and Standby current M18 (Sibley) issues: Major Software Migration: Requires FDI 6.x or 7.x New architecture 2x sector size No more dual boot partition (no WP# pin) 128Mb not included in 90nm promotion Expected production ramp 1H’06 90 nm capacity constraint rumors (Intel uses the same process / Fab for PC chipsets) Tyax Footprint Difference RFU Sibley 107 ballWS MirrorBit Chipset Support- Identify the available business: WS MirrorBit Chipset Support - Identify the available businessSpansion Look-Ahead Pinout- Consider the RAM type in 1.8V MCPs: Spansion Look-Ahead Pinout - Consider the RAM type in 1.8V MCPs Customers using SDRAM need support to choose an OPN Know the baseband to support the right pinout! Code/pSRAM/Data/SDR/DDR ALL ON SAME BUS Code/pSRAM/Data + SDR/DDR ON SPLIT BUS 137-ball pinout 137-ball pinoutSlide34: 11090 nm Multiplexed Roadmap - TI Locosto, Neptune customer focus Q2’05 Q’3 05 Q4’05 Q1’06 Q2’06 H2’ 06 NS512N 2X NS256N NS256P NS128P NS064J NS032J NS016J NS128J NS256N NS512P NS128N NS064N A M J J A S O N D J F M A M J J A S O N D Address & Data Bus Combined = Multiplexed MB designed for easy migration Same Architecture Identical command set and bank/sector Architecture Use the alignment presentation from Marketing Floating Gate Will be replaced by a new product family in 90nm New product family will be compatible to NS-J Migration information will be available in Q3’06 110 nm FG 110 nm MB 90 nm MB ES Q In Production Slide35: NS032 THE SPANSION PORTFOLIO – MCP Roadmap for NS Family NS064 NS128 NS256 MCP/POP NS with pSRAM OR DRAM MS (Optional ORNAND data) NS-N, NS-P, NS-R Burst mode Multiplexed Interface 54-133Mhz burst read 80ns Asynchronous access Simultaneous Read / Write Advanced Sector Protection Erase / Prog Susp / Resume MS-P, MS-R 1.8V MirrorBit™ x8 and x16 bus widths Xtreme Mode / NAND Interface No ECC/EDC Required Large Page/Block pSRAM: S71 Multiplexed Interface 54-104MHz burst read 70 ns Async access DRAM: S72 SDR or DDR on Bus 2 x16 104-133MHz burst mode NS MCP Family NS512 S72NS512PE0Slide36: Agenda Spansion Introduction Spansion Flash Roadmap 3V MCP Product Strategy ORNAND™ MCP Product Strategy 1.8V MCP Product StrategyIt’s a Code and Data World!: It’s a Code and Data World! Platform Architecture Density & Performance Flash Memory SoC MirrorBitTM Code Data Spansion MirrorBit™ ORNAND™: Spansion MirrorBit™ ORNAND™ NOR Advantages Fast random read & write Low-latency XIP Fast Sequential Read Ultra Reliable NOR Advantages (Optimized for Modem, OS, Apps) NAND Advantages (Optimized for Storage) NAND Advantages Fast Write Low Cost High Density New Architecture Based on MirrorBit™ Technology – Leverages high density and cost structure Faster write than NOR and faster read than NAND Enables optimal Flash memory solutions for wireless market ORNAND™MirrorBit™ ORNAND™ Scaling: MirrorBit™ ORNAND™ Scaling mm2 0 20 40 60 80 MirrorBit™ ORNAND™ MS Family NAND 90 Supplier 1 Supplier 2 Supplier 3 Source: Spansion estimates, August 2005 1Gb NAND Die size: 80-90 mm² 1Gb MirrorBitTM ORNANDTM Die size: 82 mm² Competition 1 Gb 90 nm Die SizesORNAND™ Reliability Advantage: Some Bad Blocks Traditional NAND ORNAND™ Reliability Advantage Simpler software and faster development schedule No need for complex file system to dynamically map out bad blocks Good Block Bad Block 1.8V,MS-P MCP support plan: 1.8V,MS-P MCP support plan X8MS01GP+2X256X8SDRAM---also_available_as_ES X16MS01GP+512SDRAM(X32)in_evaluation—Qualcom_MSM6280 Pls_contact_our_sales_if_you_have_different_combination_request!! MS-P Chipset Compatibility: MS-P Chipset Compatibility3V,S75PL+ML MCP Support Plan: 3V,S75PL+ML MCP Support Plan All timelines are production estimates Spansion Pinout FMH107 Spansion Pinout FMH107 Replaces all current S99-50149 designs NOR+pSRAM same bus, ORNAND on a separate bus 3-in-1 3V ORNAND MCP (S75PL-N) Configuration & Schedule: 3-in-1 3V ORNAND MCP (S75PL-N) Configuration & Schedule MCP Products under development 128Mb NOR + 32 pSRAM + 512Mb ORNAND Base OPN: S75PL127NBF (S29PL127N+32p+S30ML512P) ES: WW 25 (Mid-June 2006) QS: WW 38 (Mid-Sept 2006) 128Mb NOR + 64 pSRAM + 1Gb ORNAND Base OPN: S75PL127NCG (S29PL127N+64p+S30ML01GP) ES: WW 27 (End-of-June 2006) QS: WW 40 (End-of-Sept 2006) MCP Products under consideration (based on customer demand & volume) 128Mb NOR + 32 pSRAM + 1Gb ORNAND 128Mb NOR + 64 pSRAM + 512Mb ORNAND Any other density combinations, pls_contact_our_sales_to_request!!3-in-1 3V ORNAND MCP (S75PL-N) Configuration & Schedule: 3-in-1 3V ORNAND MCP (S75PL-N) Configuration & Schedule Can_your_customer_accept_to_adjust_current_S/W_for_block_size?3-in-1 3V ORNAND MCP (S75PL-N) Pinout: 3-in-1 3V ORNAND MCP (S75PL-N) Pinout S75PL-N configuration Bus 1 S29PL-N (Code Flash) pSRAM ( Buffer RAM) Bus 2 S30ML-P (ORNAND Data Flash) Package Pinout: 107 ball Package Size 512Mb ORNAND (ML512P) MCP: 9x12 1Gb ORNAND (ML01GP) MCP: 11x13 3-in-1 1.8V ORNAND MCP: 3-in-1 1.8V ORNAND MCP SPANSION 137-ball NAND (Bus1) + DRAM (Bus2) SPANSION 115-ball NOR (Bus1) + PSRAM (Bus1) + NAND (Bus2)Trademark Attribution: Trademark Attribution Spansion, the Spansion Logo and combinations thereof are trademarks of Spansion LLC. Other product names used in this presentation are for identification purposes only and may be trademarks of their respective companies.