89HT0832P 16-lane 8 Gbps PCIe 3.0 Retimer by IDT

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The IDT 89HT0832P is the industry's first 32-channel (16-lane) PCI Express 3.0 retimer capable of 8 Gbps-per-channel transfers, providing a total of 256 Gbps of communication bandwidth for data-intensive applications. The 89HT0832P is protocol-aware to support the PCIe 3.0-compliant equalization procedure for receiver and transmitter configuration, which eases system design-in complexity, and insures reliable low bit-error-rate (BER) operation with any PCI Express 3.0-compliant device, expansion card, or host bus adapter (HBA). The Retimer's receivers include a high-performance continuous-time linear equalizer (CTLE) analog front-end followed by a five-tap decision feedback equalizer (DFE) and clock-data-recovery (CDR) circuit. This high-performance input with dynamic optimization can recover poor quality input signals, correct random and deterministic jitter, and boost transmit amplitude -- enabling communication over long cables, long traces, or system backplanes. Presented by Ken Curt, Product manager at IDT. Learn more about IDT's signal integrity products at www.idt.com/go/SIP.

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89HT0832P 16-Lane PCIe 3.0 Retimer:

89HT0832P 16-Lane PCIe 3.0 Retimer Signal Integrity Products Enterprise Computing Division February 2013

Signal Conditioner Overview:

Signal Conditioner Overview 1 1 1 1 1 1 0 0 0 0 1 1 1 1 X 1 1 0 0 0 EQ Signal Conditioner Errors

Signal Conditioner Overview:

Improved system performance Improved system reliability Longer trace/cable Standards compliance Unique features or cost reduction Signal Conditioner Overview 1 1 1 0 0 1 1 1 0 0 EQ Signal Conditioner

Retimer Applications:

Back plane Blade server CPU T0832P Blade server (or I/O tray) IO or CPU x16 Workstation System Board T0832P CPU CPU PCIe Slots HPC Servers Storage Workstations Telecom Retimer Applications Protocol: P=PCIe No of channels=32 Data rate: 08=8Gbps Function: T=reTimer Product group prefix 89H T 08 32 P

89HT0832P Key Features:

89HT0832P Key Features 8.0Gbps, 16-lane PCIe 3.0 Retimer Resets total transmitter (TX) jitter budget 32 differential channels, gives 256Gbps throughput Fully implements PCIe 3.0 Equalization Procedure RX equalization: Analog CTLE plus 5-tap DFE TX equalization: 4-tap FIR for de-emphasis Advanced features Automatic timing and signal calibration On-die instrumentation: scope and pattern generator/checker Multiple independent link modes: 1x16-lanes, 2x8, 4x4, etc. I2C/SMB, JTAG or automatic EEPROM configuration Independent master and slave ports Compatibility features Automatic optimization for 2.5 and 5Gbps operation 100MHz clock input (SSC with common-clock ,or non-SSC) Receiver detection with termination control Full EI support. Hot-swap support Multiple automatic power reduction modes Packaging, 345-BGA 20mm x 13mm (0.8mm pitch) Green: Commercial & Industrial Data path A(0:15)TX(P:N) A(0:15)RX(P:N) EQ RSTB I2C / SMBus & registers MSDA/CL, A(2:0) FIR FIR EQ B(0:15)TX(P:N) B(0:15)RX(P:N) STATUS Control logic serdes SSDA/CL, A(2:0) Presets JTAG GCLK(P:N)

89HT0832P Key Features:

89HT0832P Key Features 8.0Gbps, 16-lane PCIe 3.0 Retimer Resets total transmitter (TX) jitter budget 32 differential channels, gives 256Gbps throughput Fully implements PCIe 3.0 Equalization Procedure RX equalization: Analog CTLE plus 5-tap DFE TX equalization: 4-tap FIR for de-emphasis Advanced features Automatic timing and signal calibration On-die instrumentation: scope and pattern generator/checker Multiple independent link modes: 1x16-lanes, 2x8, 4x4, etc. I2C/SMB, JTAG or automatic EEPROM configuration Independent master and slave ports Compatibility features Automatic optimization for 2.5 and 5Gbps operation 100MHz clock input (SSC with common-clock ,or non-SSC) Receiver detection with termination control Full EI support. Hot-swap support Multiple automatic power reduction modes Packaging, 345-BGA 20mm x 13mm (0.8mm pitch) Green: Commercial & Industrial Data path A(0:15)TX(P:N) A(0:15)RX(P:N) EQ RSTB I2C / SMBus & registers MSDA/CL, A(2:0) FIR FIR EQ B(0:15)TX(P:N) B(0:15)RX(P:N) STATUS Control logic serdes SSDA/CL, A(2:0) Presets JTAG GCLK(P:N) Fully implements PCIe 3.0 Equalization Procedure RX equalization: Analog CTLE plus 5-tap DFE TX equalization: 4-tap FIR for de-emphasis

89HT0832P Key Features:

89HT0832P Key Features 8.0Gbps, 16-lane PCIe 3.0 Retimer Resets total transmitter (TX) jitter budget 32 differential channels, gives 256Gbps throughput Fully implements PCIe 3.0 Equalization Procedure RX equalization: Analog CTLE plus 5-tap DFE TX equalization: 4-tap FIR for de-emphasis Advanced features Automatic timing and signal calibration On-die instrumentation: scope and pattern generator/checker Multiple independent link modes: 1x16-lanes, 2x8, 4x4, etc. I2C/SMB, JTAG or automatic EEPROM configuration Independent master and slave ports Compatibility features Automatic optimization for 2.5 and 5Gbps operation 100MHz clock input (SSC with common-clock ,or non-SSC) Receiver detection with termination control Full EI support. Hot-swap support Multiple automatic power reduction modes Packaging, 345-BGA 20mm x 13mm (0.8mm pitch) Green: Commercial & Industrial Data path A(0:15)TX(P:N) A(0:15)RX(P:N) EQ RSTB I2C / SMBus & registers MSDA/CL, A(2:0) FIR FIR EQ B(0:15)TX(P:N) B(0:15)RX(P:N) STATUS Control logic serdes SSDA/CL, A(2:0) Presets JTAG GCLK(P:N) Automatic timing and signal calibration

89HT0832P Key Features:

89HT0832P Key Features 8.0Gbps, 16-lane PCIe 3.0 Retimer Resets total transmitter (TX) jitter budget 32 differential channels, gives 256Gbps throughput Fully implements PCIe 3.0 Equalization Procedure RX equalization: Analog CTLE plus 5-tap DFE TX equalization: 4-tap FIR for de-emphasis Advanced features Automatic timing and signal calibration On-die instrumentation: scope and pattern generator/checker Multiple independent link modes: 1x16-lanes, 2x8, 4x4, etc. I2C/SMB, JTAG or automatic EEPROM configuration Independent master and slave ports Compatibility features Automatic optimization for 2.5 and 5Gbps operation 100MHz clock input (SSC with common-clock ,or non-SSC) Receiver detection with termination control Full EI support. Hot-swap support Multiple automatic power reduction modes Packaging, 345-BGA 20mm x 13mm (0.8mm pitch) Green: Commercial & Industrial Data path A(0:15)TX(P:N) A(0:15)RX(P:N) EQ RSTB I2C / SMBus & registers MSDA/CL, A(2:0) FIR FIR EQ B(0:15)TX(P:N) B(0:15)RX(P:N) STATUS Control logic serdes SSDA/CL, A(2:0) Presets JTAG GCLK(P:N) On-die scope and pattern generator/checker

89HT0832P Key Features:

89HT0832P Key Features 8.0Gbps, 16-lane PCIe 3.0 Retimer Resets total transmitter (TX) jitter budget 32 differential channels, gives 256Gbps throughput Fully implements PCIe 3.0 Equalization Procedure RX equalization: Analog CTLE plus 5-tap DFE TX equalization: 4-tap FIR for de-emphasis Advanced features Automatic timing and signal calibration On-die instrumentation: scope and pattern generator/checker Multiple independent link modes: 1x16-lanes, 2x8, 4x4, etc. I2C/SMB, JTAG or automatic EEPROM configuration Independent master and slave ports Compatibility features Automatic optimization for 2.5 and 5Gbps operation 100MHz clock input (SSC with common-clock ,or non-SSC) Receiver detection with termination control Full EI support. Hot-swap support Multiple automatic power reduction modes Packaging, 345-BGA 20mm x 13mm (0.8mm pitch) Green: Commercial & Industrial Data path A(0:15)TX(P:N) A(0:15)RX(P:N) EQ RSTB I2C / SMBus & registers MSDA/CL, A(2:0) FIR FIR EQ B(0:15)TX(P:N) B(0:15)RX(P:N) STATUS Control logic serdes SSDA/CL, A(2:0) Presets JTAG GCLK(P:N) Multiple independent links 1x16-lanes, 2x8, 4x4, and more 1-port x 16-lanes 2-ports x 8-lanes 4-ports x 4-lanes

Retimer Design Materials:

Retimer Design Materials 16-lane slot 16-lane finger connector EQ hint switches I2C & JTAG ports, USB configuration port T0832P 8Gbps, 16-channel PCIe3 Retimer

Retimer Benefits:

Feature Benefit Fully compliant to PCIe 3.0 auto EQ training procedure Automatic optimization to 10e-12 BER for high-performance with all system configurations, add-in cards, etc. Excellent jitter performance , correcting both Dj and Rj RX DFE and TX FIR provides most signal margin for fewer lost packets and longer trace/cables Automatic calibration Insures termination impedances, lane skew, and other functions work optimally for reliable 8Gbps operation On-die instrumentation – scope and pattern generator/checker Enables error rate monitoring, and eye diagram measurement after equalization (per PCIe standard) to insure signal optimization ASPM power management Tracks link partner state to automatically power-down idle or unused lanes Retimer Benefits

IDT Advantage:

IDT Advantage Proven protocol expertise in PCIe, timing and SERDES Industry leading Signal Integrity expertise Responsive, comprehensive technical support – on-line and local Evaluation tools, simulation support, design reviews, etc. A broad portfolio of products for many system functions Established, quality IC supplier 8Gbps Transition Eye (Preset 4) 8Gbps Non-Transition Eye (Preset 4) IDT Retimers deliver an excellent 8Gbps transmitted signal

Thank you!:

Thank you! All rights reserved

Transcript:

Hi, my name is Ken Curt. I'm a product manager at Integrated Device Technology with responsibilities for signal integrity products. Today I'd like to introduce our new 16-lane, eight gigabit per second PCI express Gen3 re-timer. The 89HT0832P signal conditioning IC. A gigabyte per second signal can degrade quickly in to noise as it travels down a wire. A noisy signal can result in bad communication, errors, and degraded system performance. Signal conditioners, such as IDT re-timers, are designed for the purpose of restoring a poor-input signal back into a high quality re-transmitted signal for better data communications. Improved signal quality results in improved system performance because there are fewer lost packets and re-tries. Better signal quality improves long-term system stability and reliability, due to better signal amplitude and timing margins. Signal conditioners enable longer signaling distances and provide other advantages, too. IDT’s T0832 retimer has 16 lanes, or 32 serial differential channels, each operating at eight gigabits per second. The device is targeted for applications in high-performance computing, rack and blade servers, storage systems, desktop work stations, and telecom systems. The IDT 0832 retimer implements numerous state-of-the-art features around a CDR and SERDES core. Equalization is an essential function of any signal conditioner, and the 0832 implements a receiver stage with continuous time linear equalizer, followed by a five-tap decision feedback equalizer. The transmit stage implements subfinite impulse response filter to provide the new pre-sheet and boost levels as defined in the PCI3 standard. Properly configuring a signal conditioner for receive and transmit equalization is probably the most challenging part of any design. Newly defined in the PCI 3.0 standard is an equalization procedure which automatically adjusts the receivers and transmitters for a low, 10 -12 bit error rates. IDT’s retimers fully implement this procedure on both upstream and downstream ports. The 0832 retimer provides automatic power-on calibration of key signals, timing, and amplitudes to provide accurate operation for the best signal quality. The T0832 retimer provides instrumentation features, including an on-die oscilloscope and pattern generator checker, with built-in and user-defined patterns. The 16-lane architecture can support multiple independent links of four or eight lanes. For product support, IDT offers an evaluation board that plugs into a PCI slot on a typical server or workstation, a Windows-based GUI for configuration register access, and the bit error contour or eye diagram utility, reference schematics, simulation models, and layout examples are available too, of course. To summarize the benefits of the IDT PCI 3.0 retimer, they include one, full compliance to the new automatic equalization procedure, ensuring a very low bit error rating and high performance. Two, excellent jitter performance, correcting both random and deterministic jitter, for the best signal integrity over longer traces. Three, automatic calibration that assures each device operates optimally in any environment, providing the best margins for long-term reliability. Four, enhanced features, such as the on-die oscilloscope, which facilitates system design and can help with monitoring, even after system deployment. And five, automatic power reduction, which minimizes power use whenever possible, on a per-lane basis. IDT is the leader in mixed analog and digital ICs, with established expertise in PCI Express, in timing, in SERDES, and signal integrity. IDT provides expert technical support and assistance with your development efforts. IDT offers a broad portfolio of ICs for many essential system functions, developed over 30 years as a supplier of quality semi-conductor devices. That concludes my presentation today. Thank you for your time and attention. Please contact IDT if you have any following questions. Transcript

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